Minesh Patel

CTO

Bengaluru, Karnataka, India8 yrs 10 mos experience
Highly Stable

Key Highlights

  • Expertise in VLSI and Embedded Systems.
  • Strong background in ASIC and FPGA design.
  • Proficient in multiple programming languages including C and C++.
Stackforce AI infers this person is a VLSI design engineer with expertise in ASIC and FPGA technologies.

Contact

LinkedIn

Skills

Other Skills

VHDLVerilogASICFPGAsynthesisXilinx ISEmodelsimcVerificationSoCVLSIMicroprocessorsIntegrated Circuit DesignRTL designProgramming

Experience

8 yrs 10 mos
Total Experience
5 yrs 10 mos
Average Tenure
3 yrs
Current Experience

Amd

2 roles

Member of Technical Staff

Jul 2025 – Present · 10 mos

Senior Silicon Design Engineer

May 2023 – Jul 2025 · 2 yrs 2 mos

Intel corporation

2 roles

Digital Design Engineer

Jul 2018 – May 2023 · 4 yrs 10 mos · Bengaluru, Karnataka, India

Intern

Jun 2017 – Jun 2018 · 1 yr · Bengaluru, Karnataka, India

Education

National Institute of Technology Surat

Master’s Degree — VLSI and Embedded systems

CDAC-ACTS

PG Diploma in VLSI — VLSI

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