Neha Pandey

Software Engineer

Bengaluru, Karnataka, India10 yrs 6 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Experienced DFT Engineer with strong technical skills.
Proficient in ASIC design and verification methodologies.
Hands-on experience in UVM and verification IP development.

Stackforce AI infers this person is a Semiconductor Engineer with expertise in DFT and verification methodologies.

Contact

Skills

Core Skills

Verification

Other Skills

UVMCVerilogMicrosoft ExcelVHDLASICPerl

Experience

10 yrs 6 mos

Total Experience

4 yrs 9 mos

Average Tenure

9 yrs 7 mos

Current Experience

Synopsys inc

Staff Engineer

Jun 2021 – Present · 4 yrs 11 mos

Mediatek

DFT Engineer

Jul 2017 – May 2021 · 3 yrs 10 mos · India

Altran technologies

DFT Engineer

Oct 2016 – Present · 9 yrs 7 mos · Bengaluru Area, India

Working at Microsemi Semiconductor & Solution

Stmicroelectronics

Intern

Jul 2015 – Jun 2016 · 11 mos · Greater Noida

Worked on Generic Verification IP development for Serial Interface Memory protocols in UVM environment.

Education

Vellore Institute of Technology

Master’s Degree — VLSI DESIGN

Jan 2014 – Jan 2016

Vellore Institute of Technology

Master's degree — VLSI DESIGN

Jan 2014 – Jan 2016

Government Engineering College Raipur

Engineer’s Degree — Electronics And Telecommunication

Jan 2009 – Jan 2013

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