Mohit Agarwal

Product Engineer

Bangalore Urban, Karnataka, India7 yrs 10 mos experience
Highly Stable

Key Highlights

  • 3+ years of experience in ASIC verification.
  • Proficient in UVM and SystemVerilog.
  • Strong analytical and problem-solving skills.
Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in ASIC design and verification methodologies.

Contact

Skills

Core Skills

Universal Verification Methodology (uvm)Systemverilog

Other Skills

PythonTest PlanningTest ExecutionPerlStatic Timing AnalysisDigital ElectronicsVery-Large-Scale Integration (VLSI)Application-Specific Integrated Circuits (ASIC)Image ProcessingMachine LearningDeep LearningMicrosoft OfficeCC++Verilog

About

Experienced ASIC PHY IP Verification Engineer with over 3+ years of hands-on experience in verifying complex semiconductor designs. Proficient in all aspects of verification methodologies, including test planning, testbench development, functional verification, and debugging. Skilled in using industry-standard verification languages and tools such as SystemVerilog, UVM, and VCS. Demonstrated ability to collaborate effectively with cross-functional teams to deliver high-quality ASIC designs on schedule. Strong analytical and problem-solving skills. Seeking to leverage expertise in ASIC verification to contribute to innovative semiconductor projects.

Experience

7 yrs 10 mos
Total Experience
2 yrs 11 mos
Average Tenure
1 yr 8 mos
Current Experience

Nvidia

Verification Engineer

Oct 2024Present · 1 yr 8 mos · Bengaluru, Karnataka, India · Hybrid

Synopsys inc

ASIC Digital Design Engineer

Jun 2021Oct 2024 · 3 yrs 4 mos · Bengaluru, Karnataka, India · On-site

  • Worked as a verification engineer in DDR PHY IP team.
PythonUniversal Verification Methodology (UVM)SystemVerilogTest PlanningTest ExecutionPerl

Boeing

Project Intern

Dec 2020Jan 2021 · 1 mo

  • Wiring Information and Release System (WIRS) is the sole authority of information for electrical wiring on Boeing commercial airplane models. WIRS allows interactive inquiry from remote terminals and online tracking and control of wiring changes.
  • I was involved in testing of this system. I had been assigned different test cases (online and batch both) to check the functionality of this application on different models like 7x7,777,RNT.

Indian institute of technology, delhi

Summer Intern

May 2019Jul 2019 · 2 mos

  • Worked on a project that comprises of analyzing a inverse neural network. This project comprises of training a neural network and after training mapping the output of k dimension back to input of n dimension. The principal challenge of our task is to find a sensible inverse projection of the locations of k output vector back to the input space of dimension n. The idea of this project is to formulate inversion by mathematical programming techniques.
  • In this method we introduce additional linear equality constraints that respects upper and lower bounds of original dataset.

Currents, nit trichy

Workshop Coordinator

Sep 2018Jun 2021 · 2 yrs 9 mos

The third dimension aeromodelling club

Tronics Member

Aug 2018Jun 2021 · 2 yrs 10 mos

Education

National Institute of Technology, Tiruchirappalli

Bachelor of Technology — Electrical and Electronics Engineering

Jan 2017Jan 2021

Rajkamal Saraswati Vidya Mandir, Dhanbad

Intermediate

Jan 2015Jan 2017

Stackforce found 100+ more professionals with Universal Verification Methodology (uvm) & Systemverilog

Explore similar profiles based on matching skills and experience

Mohit Agarwal - Product Engineer | Stackforce