Nishant Ranjan

Product Manager

Noida, Uttar Pradesh, India8 yrs 2 mos experience

Highly Stable

Key Highlights

Expert in NAND Flash Memory design verification.
Proficient in Universal Verification Methodology and System Verilog.
Strong background in functional verification and regression planning.

Stackforce AI infers this person is a Semiconductor Verification Engineer with expertise in NAND Flash Memory and UVM methodologies.

Contact

Skills

Core Skills

Universal Verification MethodologyFunctional Verification

Other Skills

System VerilogConstraint Random VerificationDevelopment of Verification and Regression PlanNAND FlashReconfigurable ComputingVery-Large-Scale Integration (VLSI)C (Programming Language)VerilogCadence VirtuosoXilinx VivadoC++VHDLField-Programmable Gate Arrays (FPGA)Test Driven DevelopmentTesting

About

• Strong Background in the design verification of NAND Flash Memory in Western Digital with almost 5 years of experience. • Skilled in Universal Verification Methodology, System Verilog, Functional Verification, Constraint Random Verification, Development of Verification and Regression Plan. • Master’s Degree in Microelectronics from BITS Pilani University.

Experience

8 yrs 2 mos

Total Experience

3 yrs 3 mos

Average Tenure

1 yr 9 mos

Current Experience

Synopsys inc

Staff R&D

Sep 2024 – Present · 1 yr 9 mos · Noida, Uttar Pradesh, India · Hybrid

Western digital

2 roles

Staff Engineer

Promoted

Jul 2022 – Oct 2024 · 2 yrs 3 mos · On-site

Took ownership for the verification of Address Generation Module using schmoo in the UVM along
with leading development activities in the UVM TB/Reference Model for Erase operations.
Leading Code Review and Verification Plan review for Erase operations in NAND.
Played a key role in the development of UVM TB for erase operation and as well developing
checkers in the reference model for the same.
Designed and executed a comprehensive regression plan and meticulously debugged the failed
simulations to ensure functionality and correctness of design.
Collaborated with Design team for the development of verification plan for new feature/Design
modes.