Palutla Akhil — Product Engineer

I am a dedicated VLSI Engineering Specialist with over 3 years of experience in advanced AMS verification, RTL design, and functional validation, working on high-impact semiconductor projects for industry leaders. I specialize in delivering precise verification solutions for High-Speed IO (HSIO) IPs, DDR memory controllers, and SERDES modules, utilizing tools such as VCS, Verdi, and Jasper Gold to ensure design accuracy and performance. My expertise in functional equivalence validation (FEV), coupled with the development of efficient test bench stimuli, has consistently ensured seamless alignment between schematic representations and behavioral models. I have also optimized process design kits (PDKs) for advanced technology nodes, driving improvements in parasitic extraction, simulations, and overall design reliability and stability. With a strong ability to collaborate across international teams, I excel in identifying and solving complex problems, ensuring that designs meet performance and functional requirements. I thrive on continuous learning and actively contribute to innovative VLSI engineering solutions. I am now looking for new opportunities where I can apply my skills in VLSI design verification, AMS verification, and PDK validation to drive the success of future semiconductor innovations. Feel free to reach out at akhilpalutla@gmail.com for potential collaborations and opportunities.

Stackforce AI infers this person is a Semiconductor Engineering Specialist with expertise in VLSI design and verification.

Location: Hyderabad, Telangana, India

Experience: 3 yrs 3 mos