Pratima Nagapurkar — DevOps Engineer
significant experience in the field of verification engineering, specifically in verifying standard Ethernet designs at various data rates, as well as verifying various peripherals and interconnecting blocks within the system. Experience with the UVM methodology and full chip verification from block level to chip level is also valuable, as is your proficiency in debugging design issues in both Verilog and VHDL. As a verification engineer, a crucial role in ensuring that designs are thoroughly tested and meet the required specifications before they are released to production. Skills in verifying and debugging complex designs are highly valued, as they are essential in identifying and resolving any potential issues that may arise.
Stackforce AI infers this person is a verification engineer with expertise in aerospace and telecommunications.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 7 mos
Career Highlights
- Expert in verification engineering for Ethernet designs.
- Proficient in UVM methodology and full chip verification.
- Skilled in debugging complex designs in Verilog and VHDL.
Work Experience
Cadence Design Systems
Lead Verification Engineer (2 yrs 3 mos)
Mobiveil Technologies (India)
Senior Verification Engineer (7 mos)
eInfochips (An Arrow Company)
Verification Engineer (2 yrs 6 mos)
Space Applications Centre, ISRO
Verification & Design Engineer at Space Applications Centre, ISRO (1 yr)
Apprentice (1 yr 3 mos)
URSC/ISRO , BANGALORE
Research Intern (3 mos)
Education
Postgraduate Degree at Indian Institute of Science (IISc)
BTech - Bachelor of Technology at Maharashtra Institute of Technology