Rajshri Gupta — Software Engineer
A competent professional with a total work experience of around 6 years in ASIC Design and the experience is broadly classified into the following categories: ✔️ Hands-on experience in HDVL like Verilog and System Verilog . ✔️ Good knowledge in RTL Design Concepts using Verilog. ✔️ Hands-on Experience and good understanding of Protocols and IP like AXI3, AXI4, APB. ✔️ Expertise in CDC and Lint. ✔️ Good knowledge of Low Power Management. ✔️ SOC Integration. ✔️ Good knowledge of UPF & VLCP. ✔️ Good Knowledge of SOC bootup. ✔️ experience integration of Graphic Processing Unit and sanity cleanup. Experience in debugging complex logic and finding the root cause of the failure. Additional Skills & Interests: Pursuing Mtech 2nd year, IITR.
Stackforce AI infers this person is a VLSI Design Engineer with strong ASIC and SOC integration expertise.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 10 mos
Career Highlights
- 6 years of experience in ASIC Design.
- Expertise in SOC Integration and Low Power Management.
- Hands-on experience with Verilog and System Verilog.
Work Experience
AMD
Silicon design engineer (3 yrs 11 mos)
Mobiveil Inc.
Hardware Engineer (1 yr 4 mos)
Synapse Design Inc.
Project Engineer (2 yrs 7 mos)
Education
Bachelor of Engineering at Basaveshwar Engineering College - India
Masters of technology at Indian Institute of Technology, Roorkee
