Bharath Kavuru

Software Engineer

West Godavari, Andhra Pradesh, India4 yrs 9 mos experience
Highly Stable

Key Highlights

  • Expertise in advanced semiconductor technology nodes.
  • Proficient in physical design methodologies.
  • Strong background in static timing analysis.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in physical design and timing analysis.

Contact

LinkedIn

Skills

Core Skills

Physical Design

Other Skills

Static Timing AnalysisUnified Power Format (UPF)

About

Physical Design Engineer with a demonstrated history of working in the semiconductors industry. Worked on 2nm, 4nm, 7nm, 14nm, 16nm technology nodes. Skilled in Floorplanning, Place, CTS & Route, Static Timing analysis, PV,IR,Layout Versus Schematic (LVS),

Experience

4 yrs 9 mos
Total Experience
4 yrs 9 mos
Average Tenure
4 yrs 9 mos
Current Experience

Mediatek

Physical Design Engineer

May 2024 – Present · 1 yr 11 mos · Bengaluru, Karnataka, India

Leadsoc technologies pvt ltd

Physical Design Engineer

Jul 2021 – Present · 4 yrs 9 mos · Banglore

Static Timing AnalysisUnified Power Format (UPF)Physical Design

Hcltech

Physical Design Engineer

Jul 2021 – May 2024 · 2 yrs 10 mos · Banglore

Education

Eluru College Of Engineering And Technology

Master of Technology - MTech — VLSI DESIGN

Jan 2016 – Jan 2018

Gvit

Bachelor's degree — Electronics and Communications Engineering

Jan 2013 – Jan 2016

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