R

Ravendra Panga

Software Engineer

India1 yr 11 mos experience

Key Highlights

  • Expertise in Physical Design for advanced semiconductor technologies.
  • Hands-on experience with 3nm design implementation.
  • Strong foundation in static timing analysis and design methodologies.
Stackforce AI infers this person is a Semiconductor Physical Design Engineer with expertise in advanced technology nodes.

Contact

Skills

Core Skills

Physical DesignStatic Timing Analysis

Other Skills

FloorplanPlacementCTSRoutingAnalysis Skew FixingLatency IssuesTCLLogic SynthesisLogic DesignConcept Of MosfetVerilogDigital Electronics

Experience

1 yr 11 mos
Total Experience
1 yr 11 mos
Average Tenure
1 yr 11 mos
Current Experience

Mediatek

Physical Design Engineer

Jul 2024Present · 1 yr 11 mos · Bengaluru

  • Worked on a block level implementation on technology for 3 nm design.
  • experiencing on Floorplan , Placement ,CTS, Routing.
  • and signoffs like PV cleaning, IR fixing and STA on tweaker.
Physical DesignFloorplanPlacementCTSRoutingStatic Timing Analysis

Synopsys inc

Intern

Jul 2023Jun 2024 · 11 mos · Bangalore Urban

  • worked in a methodology team on PNR on node 16nm.
  • worked on floorplan, CTS .
  • analysis skew fixing and latency issues.
FloorplanCTSAnalysis Skew FixingLatency IssuesPhysical Design

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