Sardar Harpreeth Singh — Software Engineer
B.Tech in Electronics & communication with 7+ years of strong experience in VLSI semiconductor industry Physical Design & physical verification. > Expertise in Physical Design activities such as : Floor-planning, P&R, Extraction, Power IR/EM, Physical Verification (DRC/LVS) and Signal Integrity > Advanced knowledge of place and route methodologies > understanding on aspects of Physical design trending from Synthesis to signoff. > Worked on TSMC lower technology nodes 2nm , 3nm, 5nm, 7nm, 10nm & 14nm & Intel technology nodes 18A. > Static Timing/Crosstalk Analysis and timing closure > Physical Design Flow and Methodology > Ability to lead the team along with the project execution > Expertise with Backend Tools (ICC, PrimeTime, Redhawk , Redhawk_sc, ICV & ICWBEV ) > programming knowledge in TCL Scripting, AWK, grep, sed & Unix. > Experience in working with analog IP, hard and soft macros and delivering hierarchical design projects > Communicate regularly with the implementation and project team to resolve issues. > I have worked on block section and super section level hierarchy. > Worked on varieties of ECO's which would involve calibre, timing and RV fixes > Worked on block, section and super section level.
Stackforce AI infers this person is a VLSI Physical Design Engineer with extensive experience in semiconductor technology.
Location: Bangalore Urban, Karnataka, India
Experience: 9 yrs 1 mo
Skills
- Physical Design
- Static Timing Analysis
Career Highlights
- 7+ years in VLSI semiconductor industry
- Expertise in Physical Design and Verification
- Experience with advanced technology nodes
Work Experience
Intel Corporation
Physical Design Engineer (3 yrs 10 mos)
Ulkasemi Limited
Senior Physical Design Engineer (1 yr)
Capgemini
Senior Physical Design Engineer (2 yrs 6 mos)
Design Engineer (1 yr)
jagruti institute
Internship Trainee (9 mos)
Education
Bachelor of Technology - BTech at Jawaharlal Nehru Technological University