Saurabh Jain — DevOps Engineer
I completed my Ph.D. from National University of Singapore (NUS) on the topic of "energy efficient reconfigurable microarchitecture for DSP accelerators, memories and microprocessor based systems" where I explored the pipeline level and thread level reconfigurability on FFT accelerators and microprocessors respectively to extend the energy and performance beyond conventional voltage scaling (DVFS). My interest and specialization is in SRAM design and developing SRAM based In-memory CNN solutions for image recognition.
Stackforce AI infers this person is a Semiconductor and AI/Deep Learning specialist with a focus on energy-efficient designs.
Location: Bengaluru, Karnataka, India
Experience: 9 yrs 4 mos
Skills
- Sram
- Deep Learning
- Energy Efficient Design
Career Highlights
- Ph.D. in Energy Efficient Microarchitecture from NUS.
- Expertise in SRAM design and In-memory CNN solutions.
- Experience in PCIe-4.0 development and digital design optimization.
Work Experience
iRageCapital Advisory Private Limited
Fpga lead (3 yrs 7 mos)
Intel Labs
Research Scientist at Processor Architecture Research Labs (PARL) (2 yrs 7 mos)
National University of Singapore
Research Fellow (1 yr 2 mos)
Ph.D. Student (1 yr)
Mentor Graphics
Senior Member of Technical Staff (1 yr)
Education
Doctor of Philosophy - PhD at National University of Singapore
Master of Technology - MTech at Indian Institute of Technology, Kanpur
Bachelor of Technology - BTech at Indian Institute of Technology, Kanpur
Internship at Nanyang Technological University Singapore
