Neel shah — Software Engineer
Domain : Asic Design verification Methodology : UVM,teal-truss HDL : Verilog HVL : System Verilog, C++ tools: VCS , Verdi repository: SVN, Perforce (git) Scripting : Perl , python , shell Concept : Oops Basic language : c , java , python advance operating system : windows 10 , linux (fedora) others : Avr microcontrollers (work on AT mega 32) working knowledge on: Ethernet Clause - 82,91,119,105 . GPU verification for High-end Exynos processors Amba - AXI, AHB3-Lite Projects- VIP development- AHB3 Lite, AXI SOC - Ethernet based SoC GPU - Part of Exynos High-end processor, working on Geometry block
Stackforce AI infers this person is a Networking and ASIC Design Verification Specialist with a focus on high-performance systems.
Location: Ahmedabad, Gujarat, India
Experience: 5 yrs 2 mos
Skills
- Design Verification Engineer
- Functional Verification
Career Highlights
- Expert in ASIC design verification with UVM methodology.
- Experience in GPU verification for high-end processors.
- Proficient in Ethernet protocol debugging and test bench development.
Work Experience
Samsung Semiconductor
Associate staff engineer (1 yr 7 mos)
eInfochips (An Arrow Company)
Design Verification Engineer (3 yrs 1 mo)
project traniee verification (6 mos)
Education
BE - Bachelor of Engineering at vishvakarma government engineering College , Ahmedabad, Gujarat, India
12th at shree Ganesh vidhya mandir
