Kush Agarwal — Software Engineer
Hello, I’m Kush Agarwal; I’m a dedicated, hard-working, and highly motivated Electrical Engineer and SystemVerilog Verification specialist. I hold a Bachelor of Technology degree in Electronics and Communication Engineering and currently pursuing a Master of Science in Electrical and Electronics Engineering with an anticipated graduation date of Dec,2018. I have exceptional attention to detail and pride myself on managing all aspects of assigned projects including budgets, test scenarios, documentation, and equipment. I have a solid understanding of Hardware design and Verification concepts. I have experience in SOC level verification based on UVM, SystemVerilog and Constrained Driven Verification Environment. I’m interested in connecting with industry professionals and would love to discuss how I would be a great addition to your organization! Please feel free to connect with me to learn more about my experience, background, and expert industry knowledge. Specialities: ●RTL Design in VHDL,Verilog and System Verilog in a SOC and ASIC environment. ●Excellent background knowledge on tools like QuestaSim Functional Verification tool(Mentor Graphics),Cadence Virtuoso Layout, Xilinx ISE , Modelsim ,Matlab. ●Good knowledge of languages like Bash,PERL, C, C++, Python, VHDL, Verilog, Systemverilog. ●Experience with UNIX/Linux. ●Good understanding of System Verilog Assertions(SVA) and Functional Coverage. ●Good understanding of UVM verification methodology.
Stackforce AI infers this person is a Verification Engineer with expertise in VLSI and telecommunications.
Location: Bengaluru, Karnataka, India
Experience: 8 yrs 9 mos
Skills
- Systemverilog
- Verification
- Design
- Teaching
- Hardware Design
- Event Management
- 5g Technology
- Testing
- Telecommunications
- Rf Planning
- Network Management
Career Highlights
- Expert in SystemVerilog and UVM verification methodologies.
- Strong background in RTL design and hardware verification.
- Proven experience in managing complex engineering projects.
Work Experience
Intel Corporation
SoC Pre-Si Verification Engineer (6 yrs 4 mos)
Netronome
Design Verification Engineer (6 mos)
New York University
Graduate Teaching Assistant (3 mos)
NYU WIRELESS
Student Assistant and Graduate Administrative Assistant (8 mos)
Eagle Construction
Design and Verification Engineer (1 yr 2 mos)
Nokia
Summer Telecommunications Intern (1 mo)
Bharat Sanchar Nigam Limited
Summer Telecommunications Intern (1 mo)
Education
Master's degree at NYU Tandon School of Engineering
Bachelor of Technology - BTech at Manipal Institute of Technology
Higher Secondary school at Delhi Public School, Lucknow
