Mar 2015 – Jul 2018 · 3 yrs 4 mos · Noida Area, India

• Led physical design for 2 SoC's with First Pass Silicon success ! Also, worked on 16FF high freq partitions of multi million instance count using both Synopsys & Cadence tool sets

Dec 2012 – Mar 2015 · 2 yrs 3 mos · Noida Area, India

• Completed 1 tapeout leading to 1st pass Silicon while working on top level P&R of a 31M gate SoC in 28nm with ARM library set. Targeted for automotive ADAS-vision segment, design was spread across 15 physical partitions with a drawn die size of ~68.7mm2. It included 4 ARM-Cortex-A53 cores running at 1Ghz, 2 APEX2 cores running at 500Mhz and GC3000 GPU3D running at 600Mhz with external memory i/f data rate of 1066MHz (DDR3).
• Completed 1 Test Chip tapeout based on TSMC 28nm node using ARM library set. Handled end-end APR including CTS for ~7mm2 flat design which included ~12 analog IPs. This provided an opportunity to understand C28 flow and gather important learning.
• Completed 1 tapeout while working on top level P&R of a quad-core uC for safety critical automotive applications in 55nm FG process. Chip complexity included > 9M gates across 3 physical partitions with a die size ~69mm2. Top critical path performance target was 320MHz while cores worked at 266MHz/133MHz.
• Key new skills - Cadence EDI, Design Sync, QRC

Aug 2011 – Dec 2012 · 1 yr 4 mos · Bangalore

• Worked on PD aspects of ARM-R4 based low power MCUs for Safety critical applications. Chips were executed in TI 65nm FG Flash process.
• Completed 1 tapeout for a new product and 2 tapeouts for revisions.

Nov 2007 – Jul 2011 · 3 yrs 8 mos · Bangalore

• Worked on physical design/timing closure of complex blocks for WW ASIC customers - Canon and Ericsson. Have experience in blocks closure at TI-45nm low power node on Canon-Digic 5 processor and TSMC-40nm high performance node (500MHz) on Ericsson Hermes program.
• Defined and automated a unified flow which was used across 32 partitions on the program.

Jan 2005 – Oct 2007 · 2 yrs 9 mos · Bangalore

• Worked on DDR, DDLL IPs for DDR, DDR-II, QDR, MDDR standards with prime focus on Physical Design and flows in 90nm, 65nm high performance as well as low power nodes. Extensive experience in working with Internal/external Customers and WW cross-functional teams.
• Was key contributor in defining the PD flow for Integrated DDR, IOs and DDLL macros (IDID).
• Managed a team of 4 Wipro engineers for one of the IDID developments. Received Star performer award for this in 2007.

Jun 2004 – Dec 2004 · 6 mos · Bangalore

• Designing core cells for high performance Digital IPs

Jun 2003 – Jun 2004 · 1 yr · Hyderabad, Bangalore

• June 2003 - Sep 2003 (Hyderabad)
• Joined Infy straight out of campus. Was trained at their Hyderabad facility in Open Systems. Got exposure to Global Delivery Model, Outsourcing and technical concepts in programming - C, OOPS, DBMS, UNIX, VB, SDLC. On Soft aspects - got training in project leading, cross culture sensitivity, communication skills to name a few. Overall a great learning experience.
• Sep 2003 - June 2004 (Bangalore)
• Worked as Software Engineer in BOFA account of BCMD division at Bangalore. Major responsibilities included manual testing and automation of test scripts for a Stock Market application. Got exposure to Win-runner, Test Director and programming in Perl. Also got good exposure to financial domain.

Jun 2002 – Dec 2002 · 6 mos · Noida, Uttar Pradesh, India

• My first industry experience in embedded systems domain as intern.
• Worked on 2 major projects-
• 1. GPS/GSM based vehicle tracking system - for a Mumbai based Cab services client.
• 2. Machine Networking System - a data logging project for automation of machine floor of Sona Koyo Steerings, Gurgaon.
• Key Learnings - Embedded systems, Micro-controllers 8051, Rabbit-2000, Dynamic C, RS-232 protocol, AT-command set for GSM modems, Product Development Life Cycle.
• In addition, got a unique exposure that is rare to get in a traditional planned internship. e.g.-
• 1. Assembled my 1st PC from scratch (back in 2002). Took this learning to set a 4-PC lab in Electronics Lab at college.
• 2. Almost made a functional GSM mobile phone board as part of Vehicle tracking system.
• 3. Got an early customer interaction exposure with managers and shop floor workers at Sona Koyo for Machine Netwroking System.
• 4. Rare opportunity to read Texas Instruments manuals (the blue/yellow bibles)