Sashank Nishad — CTO
Power Delivery Expert ASIC, Soc Power Integrity sign-Off. Low power compliance, Early stage power integrity checks and power planning methodology development. Expertise : PDN, ESD, Multiple mode multiple corner Static, Dynamic (vectorless, mixed mode/RTL-fsdb, gate level-fsdb, ATPG, scan shift , scan capture, mbist ) , gds based Static IR drop analysis and Sign-off. EM (Signal & Power)/ESD and related check and sign-off. PDN convergence and Sign-Off. Congestion aware power planning.Bump/PAD optimization (Wirebond and Flipchip Package). Power aware timing feedback and checks. Flow development for Power integrity simulations. Multiple tapeouts of high performance and low power SoCs with zero postsilicon issue.
Stackforce AI infers this person is a Semiconductor Power Delivery Expert with extensive experience in ASIC design and methodology.
Location: Bengaluru, Karnataka, India
Experience: 12 yrs 9 mos
Skills
- Power Delivery
- Methodology
- Power Integrity
- Physical Design
Career Highlights
- Expert in power delivery and integrity methodologies.
- Led multiple successful tapeouts with zero post-silicon issues.
- Specialized in congestion-aware power planning and optimization.
Work Experience
Power Delivery Tech and Methodology Lead (9 mos)
Intel Tech. India Private Limited,Bangalore
SoC Sr Tech Lead Power delivery Engineer (7 yrs 7 mos)
MediaTek
Power Delivery Engineer (1 yr 5 mos)
Qualcomm
Physical Design Engineer (2 yrs 11 mos)
Education
B-tech at MNNIT