Nunna Ranga B.

Software Engineer

Bengaluru, Karnataka, India8 yrs 3 mos experience

Key Highlights

  • Expert in Physical Design and Static Timing Analysis.
  • Strong background in VLSI and semiconductor industry.
  • Proficient in multiple design tools including Perl and Tcl-Tk.
Stackforce AI infers this person is a Physical Design Engineer specializing in VLSI within the semiconductor industry.

Contact

Skills

Other Skills

FloorplanningClock Tree SynthesisCTSSTACadenceP&RTiming ClosureLow-power DesignGDSVERILOG TO GDSIIPlace & Routelogic equivalence check

About

Physical Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Perl, Design Rule Checking (DRC), Static Timing Analysis, Tcl-Tk, and Physical Design. Strong engineering professional with a Bachelor of Technology (BTech) focused in Electronics and Communications Engineering from Sri Vasavi Engineering College, Pedatadepalli, Tadepalligudem, PIN-534101 (CC-A8).

Experience

8 yrs 3 mos
Total Experience
2 yrs
Average Tenure
2 yrs
Current Experience

Nvidia

Senior Physical Design Engineer

Apr 2024Present · 2 yrs 1 mo · Hyderabad, Telangana, India · On-site

Mediatek

Senior Physical Design Engineer

Nov 2021Mar 2024 · 2 yrs 4 mos · Bengaluru, Karnataka, India

  • Senior Physical Design Engineer

Cerium systems

Senior Physical Design Engineer

Apr 2021Oct 2021 · 6 mos · Bengaluru, Karnataka, India

  • Senior Physical Design Engineer

Worked as a contractor at intel, nvidia, ineda systems from (siliconus to l&t to above companies)

Physical Design Engineer

Nov 2017Apr 2021 · 3 yrs 5 mos · Bangalore Urban, Karnataka, India

  • Physical Design Engineer

Education

Sri Vasavi Engineering College

B.tech — Electronics and communication engineering

Jun 2012May 2016

Pragathi junior college, Tanuku

Intermediate — MPC

Jan 2010Jan 2012

Gowtham model school/ Tanuku public school

schooling

Aug 1998Jan 2010

Stackforce found 100+ more professionals with Floorplanning & Clock Tree Synthesis

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