NITISH KUMAR — Software Engineer
Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve product-level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and SoC implementations.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 9 mos
Skills
- Physical Design
- Static Timing Analysis
Career Highlights
- Expert in physical design and SoC implementation.
- Proficient in static timing analysis and design optimization.
- Strong background in ASIC and VLSI methodologies.
Work Experience
Samsung Semiconductor
Senior Staff Engineer (2 yrs)
Intel Corporation
SOC Design engineer (5 yrs 9 mos)
Education
Master of Technology at Indian Institute of Technology, Delhi
Bachelor of Technology - BTech at SRM IST Chennai
