V

Vivek Barnwal

Product Engineer

Bangalore, Karnataka, India7 yrs 9 mos experience
Most Likely To Switch

Key Highlights

  • Expert in power analysis and optimization strategies.
  • Proven track record in delivering high-performance IP solutions.
  • Strong automation skills enhancing team productivity.
Stackforce AI infers this person is a Semiconductor Power Engineer with expertise in automation and power optimization.

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Skills

Core Skills

Power AnalysisAutomationPower EstimationModelingPower Optimization

Other Skills

Python (Programming Language)Shell ScriptingTCLMicrosoft ExcelLow-power DesignptpxVerilogperlTime ManagementPersonal DevelopmentEnglishcsh

About

ASIC Power engineer with strong automation skills. I hold a Master of Technology (M.Tech.) in Microelectronics and VLSI from the Indian Institute of Technology, Kharagpur after securing an All India Rank of 151 in GATE 2016 (EC). As a highly motivated Power Analysis and Optimization Engineer, I have a proven track record of delivering high-performance IP solutions with optimal power efficiency. My expertise lies in IP power analysis, deep-dive investigations, and power optimization strategies, ensuring teams achieve best-in-class power results.

Experience

Google

Low Power Engineer

May 2023Present · 2 yrs 10 mos · Bengaluru, Karnataka, India · Hybrid

  • Worked on gate-level and RTL-level power estimation and power analysis for two
  • IPs.
  • Automated the runs, debugging, and analysis to reduce the turnaround time in
  • each category.
  • Worked with the stakeholders to provide timely feedback based on the
  • results.
  • Wrote many Python, Shell, and TCL-based scripts for automation, and | also
  • shared the scripts with the team to increase the team's overall productivity.
  • Wrote a script to get the rail-based dynamic power across SSWRPS for better
  • correlation with post-Si power measurements.
  • Wrote a script to get the rail-based memory leakage across SSWRPS.
  • Wrote a script to analyze the whole design based on the toggle rate across cell
  • categories viz. Combinational, Register, Sequential, etc
  • Wrote a script for glitch power profiling, significantly improving team awareness and optimization efforts
Python (Programming Language)Shell ScriptingTCLAutomationPower Analysis

Nvidia

Senior ASIC engineer

Mar 2021May 2023 · 2 yrs 2 mos · Bengaluru, Karnataka, India

  • I work on architectural power estimation and modelling of GPUs to analyze dynamic and leakage power of pre-Si chips. My responsibility includes developing power models to estimate chip power under product driven use-cases. I also work on improving the flow and methodology used. Good in debugging skills.
Python (Programming Language)Microsoft ExcelPower EstimationModeling

Intel corporation

SoC Design Engineer

Jun 2018Mar 2021 · 2 yrs 9 mos · Bengaluru Area, India

  • Responsible for meeting power KPIs by implementing low power techniques on designs for sign-off.
  • Automated the flow which can run ptpx using single script for following
  • vector-less or vector-based run
  • vector-less with different toggle rates
  • FSDB based or SAIF based
  • different tool versions
  • Written many scripts to debug and analyze the ptpx results.
Microsoft ExcelLow-power DesignPower OptimizationAutomation

Education

Indian Institute of Technology, Kharagpur

Master of Technology (M.Tech.) — Microelectronics and VLSI

Kamla Nehru Institute of Technology (KNIT), SULTANPUR (U.P.)

Bachelor of Technology - BTech — Electronics Engineering

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