Sai Surya — Product Engineer

I am a Design Verification Engineer with hands-on experience in building UVM-based testbenches, verifying digital IPs, and developing protocol-level RTL/FPGA designs. My work spans constrained-random stimulus generation, functional coverage, assertions, debugging waveforms, and creating modular verification components. Alongside verification, I also have strong RTL experience through multiple FPGA-based implementations. Key technical projects completed by me include: Ethernet MAC (802.3) Verification: Verified TX/RX paths, collision detection, jam sequence, and MII signaling using a layered UVM environment. AXI VIP Development: Designed a scalable AXI VIP with configurable burst types, response handling, and protocol checkers. Interrupt Controller Verification: Built a UVM testbench with priority-based test scenarios achieving 100% functional coverage. Memory Controller Verification: Verified read/write sequences, address decoding, and data integrity with constrained-random tests. I2C Address Translator (ATR): Implemented a fully functional ATR system interfacing multiple slaves on the Artix-7 FPGA board. DHT11 Humidity Monitoring System: Designed the complete protocol, display logic, and motor control on the Nexys4 Artix-7 FPGA. UART Controller: Developed transmitter, receiver, and baud generator with simulation and top-level integration. IR-Based Room Lighting System: Built an entry/exit counting system using IR sensors and FPGA FSM design. These projects have strengthened my capabilities in SystemVerilog, UVM, AXI protocol behaviour, behavioural and synthesizable RTL, FPGA flow, debugging, and digital design fundamentals. I am seeking opportunities where I can contribute to high-quality verification and continue growing as a design verification engineer. https://docs.google.com/videos/d/16jPFGrO2zCNPCp14OC8u5_KqhH2jTTef1gHrOyxYQ7U/edit?usp=sharing

Stackforce AI infers this person is a Design Verification Engineer specializing in semiconductor and FPGA technologies.

Location: Andhra Pradesh, India

Experience: 0 mo