Prameeth H — Software Engineer
Skilled in Universal Verification Methodology (UVM), SystemVerilog, C (Programming Language), and Verilog. Strong engineering professional with a Bachelor of Engineering - BE focused in ELECTRONICS AND INSTRUMENTATION from R. V. College of Engineering, Bangalore.
Stackforce AI infers this person is a Design Verification Engineer with expertise in VLSI and semiconductor industries.
Location: Bengaluru, Karnataka, India
Experience: 4 yrs 9 mos
Skills
- Functional Verification
Career Highlights
- Expert in Functional Verification and VLSI Design.
- Strong background in UVM and SystemVerilog methodologies.
- Engineering degree from a prestigious institution.
Work Experience
Analog Devices
Senior Design Verification Engineer (5 mos)
Samsung Semiconductor
Associate Staff Engineer (7 mos)
Senior Engineer (3 yrs 8 mos)
Samsung Electronics
Hardware Engineering Intern (4 mos)
Education
Master's degree at Birla Institute of Technology and Science, Pilani
Bachelor of Engineering - BE at R. V. College of Engineering, Bangalore