G Vamsi Girish

Software Engineer

Bengaluru, Karnataka, India3 yrs 9 mos experience

Key Highlights

  • Expert in PCIe protocol verification and design.
  • Strong background in System on a Chip (SoC) development.
  • Proven leadership in design verification at top tech companies.
Stackforce AI infers this person is a VLSI and semiconductor verification expert with extensive experience in high-performance computing.

Contact

LinkedIn

Skills

Core Skills

System On A Chip (soc)Assertion Based VerificationInterconnect Protocols

Other Skills

SystemVerilogComputer ArchitectureUniversal Verification Methodology (UVM)NOC IP VerificationPCIe/CXL DVMakefileShell ScriptingC++Digital Circuit DesignSystem VerificationVerilogLeadershipResearchEngineeringVery-Large-Scale Integration (VLSI)

About

PCIe course in YouTube Channel name- Vamsi Girish https://youtu.be/dGbSaV-gyUs Scenario based PCIe protocol verification Training Registration Form: https://docs.google.com/forms/d/13hVBNhDriYU-tfPQmaKa431zdSwyxhb1vbmWJGyitH8/edit

Experience

3 yrs 9 mos
Total Experience
1 yr 10 mos
Average Tenure
1 mo
Current Experience

Amd

Senior silicon Design Engineer

Mar 2026 – Present · 1 mo · Bengaluru · Hybrid

Interconnect protocolsAssertion Based VerificationSystemVerilogComputer ArchitectureSystem on a Chip (SoC)Universal Verification Methodology (UVM)

Qualcomm

Senior Design Verification Engineer,NOC IP

Feb 2024 – Feb 2026 · 2 yrs · Hyderabad · On-site

  • NOC IP Verification
NOC IP VerificationInterconnect protocols

Cadence design systems

IP Verification Engineer

Jun 2022 – Feb 2024 · 1 yr 8 mos · Noida · On-site

  • PCIe/CXL DV
PCIe/CXL DVAssertion Based Verification

Education

National Institute of Technology, Tiruchirappalli

electronics and communication — VLSI System

Jan 2020 – Jan 2022

Kshatriya college of engineering

Bachelor of Technology - BTech

Aug 2015 – Jun 2019

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