Rajneesh Dhadwal — Software Engineer
19 Years of Experience in x86/ARM based SoC Verification using Latest Industry Tools. Testbench Architecture, Testplan development, Test bench development using SV-OVM/UVM and verilog, Server SoC validation infrastructure setup and feature validation. Networking SoC testbench setup and feature Validation. Cortex-M boot flow setup, RTL debugging and bug fixing. Low power verification( NLP ) for complete SoC. Gate level setup and simulations, Specialties: - SoC Verification, testbench architecture and development, System Verilog, OVM,UVM,HDL. - have working experience in USA,Germany, Singapore. - Managing Team and verification activities.
Stackforce AI infers this person is a Semiconductor Verification Expert with extensive experience in SoC and testbench development.
Location: Bengaluru, Karnataka, India
Experience: 20 yrs 8 mos
Skills
- Soc Verification
- Testbench Architecture
Career Highlights
- 19 years of experience in SoC verification.
- Expert in System Verilog and UVM methodologies.
- Proven leadership in managing verification teams.
Work Experience
Intel Corporation
Technical Lead (7 yrs 4 mos)
L&T Technology Services Limited
Senior Technical Lead (1 yr 3 mos)
Synapse Design Inc.
Senior Technical Lead (11 mos)
Wipro Technologies
Senior Project Engineer (11 yrs 2 mos)
Education
B. Tech. at National Institute of Technology Hamirpur
