SAGAR ABACHI

Software Engineer

Karnataka, India7 yrs 9 mos experience
Highly Stable

Key Highlights

  • 5+ years of experience in SRAM design engineering.
  • Expertise in low-power and high-speed memory design.
  • Proficient in multiple programming languages including C and VHDL.
Stackforce AI infers this person is a SRAM design engineer with expertise in low-power and high-speed memory technologies.

Contact

LinkedIn

Skills

Core Skills

Custom Memory Design(sram)Low-power DesignTransistorsCmos

Other Skills

HC BitcellBitcell analysisHigh Speed DesignTwo port Memory Design8T Bitcell Memory Designsense amplifierLock upPower-onMemory CharacterizationLogic DesignCC++VHDLVerilogDigital electronics

About

Having 5+ years of industry experience as a SRAM design engineer .

Experience

7 yrs 9 mos
Total Experience
7 yrs 9 mos
Average Tenure
7 yrs 9 mos
Current Experience

Mediatek

3 roles

Staff Engineer

Promoted

Jun 2024 – Present · 1 yr 10 mos

Custom Memory Design(SRAM)HC BitcellLow-power Design

Senior Engineer

Promoted

Jul 2020 – Oct 2024 · 4 yrs 3 mos

TransistorsBitcell analysis

SRAM circuit Design Engineer

Jul 2018 – Jul 2020 · 2 yrs

TransistorsCMOS

Education

RV College Of Engineering

Bachelor of Engineering - BE

Jan 2014 – Jan 2018

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