Pabbu Varshitha — Software Engineer

AREA OF EXPERIENCE:- • XOR(Compression) insertion for reducing test time and test data volume. • Automatic Test pattern generation (ATPG) for stuck-at & transition delay fault models. • Done the Coverage analysis for Stuck at and TDF. • Test Coverage improvement, resolving DRC’s, pattern coverage improvement activities. • Pattern Verification & simulations: gate level and timing serial/parallel pattern with successful ATE validation. • Knowledge and understanding of IEEE 1149.1(JTAG), Wrappers ,OPCG.

Stackforce AI infers this person is a Semiconductor DFT Engineer with expertise in test pattern generation and coverage improvement.

Location: Bengaluru, Karnataka, India

Experience: 1 yr 10 mos