Deepak Agarwal — Director of Engineering
18+ years of Industry Experience in semiconductor domain. Handling a team responsible for Integration, Synthesis, Low Power Checks, Signoff STA for TV/XR/Mobile SoC. Specialties: Synthesis, STA, CLP, LEC and Signoff Timing Closure for large ASIC designs, especially (SoC, MODEM, CPU, GPU)
Stackforce AI infers this person is a Semiconductor Engineering Expert with extensive experience in ASIC and SoC design.
Location: Bengaluru, Karnataka, India
Experience: 18 yrs 5 mos
Skills
- Asic
- Sta
Career Highlights
- Over 18 years of experience in semiconductor industry.
- Expertise in ASIC design and timing closure.
- Proven leadership in managing technical teams.
Work Experience
MediaTek
Senior Department Manager (10 mos)
Department Manager (1 yr 6 mos)
Technical Manager (1 yr 2 mos)
Senior Staff Engineer (3 yrs 4 mos)
Staff Engineer (1 yr 11 mos)
Sr. Engineer (1 yr 10 mos)
SmartPlay Technologies
Sr. Engineer (3 mos)
Qualcomm
Engineer III (2 yrs 10 mos)
Wipro Limited
Sr. Engineer (3 yrs 11 mos)
QuickLogic Corporation
Engineer (3 yrs 11 mos)
Education
PGDiploma at Sandeepani School of VLSI Design
B.E. at Govt. Engg. College Bikaner