Abhilash C H — Software Engineer
Verification Engineer with hands on experience in system verilog-uvm based ip and soc verification , with experience in 3rd party VIP integration and bring up.Also worked on no_timing gate level simulation. Have good understanding of protocol like Pcie Gen4/5, USB 2.0 and AXI protocol .
Stackforce AI infers this person is a Verification Engineer specializing in semiconductor and hardware design verification.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 9 mos
Skills
- System Verilog
- Universal Verification Methodology (uvm)
Career Highlights
- Expert in system verilog and UVM for IP verification.
- Hands-on experience with protocol verification including PCIe and USB.
- Proficient in integrating third-party verification IPs.
Work Experience
Intel Corporation
Pre Silicon Verification Engg (4 yrs 4 mos)
Wipro Limited
Design Verification Engineer (3 yrs 3 mos)
Graphene Semiconductor Services Pvt Ltd.
Design Verification Engineer (1 yr 5 mos)
Indian computer corporation
Desktop Support Engineer (1 yr 9 mos)
Education
Bachelor of Engineering - BE at Visvesvaraya Technological University
