Tanay Kumar Kesarwani — Software Engineer
Hi, I'm Tanay, Electrical Engineer graduate. Trained in ASIC VERIFICATION. Having a Good Knowledge in Digital Design, Hardware language and scripting. Knowledge of design creation for zynq and versal in vivado. Knows DFx implementation in vivado. Key Skills: * Hardware langauge: Verilog, System Verilog * Programming Language: C, C++ * Scripting language: Bash, TCL/tk, tk-inter and Python * EDA Tools: Synopsys VCS, Xilinx ISE, Vivado.
Stackforce AI infers this person is a skilled FPGA and ASIC design engineer with a focus on digital electronics.
Location: Delhi, India
Experience: 6 yrs 1 mo
Skills
- Fpga
- Digital Design
- Python
Career Highlights
- Expert in FPGA design and automation.
- Proficient in Python and scripting languages.
- Strong background in ASIC verification and digital design.
Work Experience
AMD
Sr. System Design Engineer (2 yrs 9 mos)
System Design Engineer II (1 yr 5 mos)
Xilinx
System Design Engineer 2 (9 mos)
System Design Engineer (1 yr 2 mos)
Aujus Technology Private Limited
Intern (3 mos)
Rudraksha Technology
Hardware FPGA Design Engineer (3 mos)
PinE Training Academy
Trainee (11 mos)
Education
Bachelor of Technology at Inderprastha Engineering college
