S

Sayantani Bala

Software Engineer

Bhubaneswar, Odisha, India6 yrs 9 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in emulation and verification methodologies.
  • Strong background in semiconductor industry.
  • Proficient in multiple programming languages.
Stackforce AI infers this person is a semiconductor validation engineer with expertise in emulation and verification.

Contact

LinkedIn

Skills

Core Skills

EmulationUniversal Verification Methodology (uvm)

Other Skills

VerilogSystemVerilogC (Programming Language)C++Python (Programming Language)PCIeAMBA APBAMBA AHBGitLinuxZebu

About

Experienced Validation Engineer with a demonstrated history of working in the semiconductors industry. Skilled in Verilog, Universal Verification Methodology (UVM), SystemVerilog, Teamwork, and C (Programming Language). Strong engineering professional with a Bachelor of Technology - BTech focused in ETC from Trident Academy of Technology (TAT), Bhubaneswar.

Experience

6 yrs 9 mos
Total Experience
3 yrs 4 mos
Average Tenure
3 yrs 8 mos
Current Experience

Intel corporation

Emulation engineer

Aug 2022 – Present · 3 yrs 8 mos · Bengaluru, Karnataka, India

EmulationVerilogSystemVerilogUniversal Verification Methodology (UVM)

Perfectvips

ASIC Verification engineer

Jul 2019 – Aug 2022 · 3 yrs 1 mo · Bhubaneshwar, Odisha, India

Education

Trident Academy of Technology (TAT), Bhubaneswar

Bachelor of Technology - BTech — ETC

Jan 2015 – Jan 2019

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