Sandeep kumar

Software Engineer

Bengaluru, Karnataka, India3 yrs 9 mos experience

Key Highlights

Expert in DFT methodologies and digital IC design.
Proven experience in Automatic Test Pattern Generation.
Strong background in VLSI System Design.

Stackforce AI infers this person is a Digital IC Design expert with a focus on DFT methodologies.

Contact

Skills

Core Skills

DftDigital Ic Design

Other Skills

Scan InsertionAutomatic Test Pattern Generation (ATPG)DFT SimulationEDT LogicMBISTZero delay and Timing SimulationScripting in PythonScan CompressionATPGVerilogC (Programming Language)Xilinx VivadoCadence Virtuoso

Experience

3 yrs 9 mos

Total Experience

1 yr 9 mos

Average Tenure

3 mos

Current Experience

Mediatek

Senior DFT Engineer

Jan 2026 – Present · 3 mos · Bengaluru, Karnataka, India · On-site

DFTScan InsertionAutomatic Test Pattern Generation (ATPG)DFT SimulationDigital IC Design

L&t semiconductor technologies

DFT Engineer

Aug 2024 – Jan 2026 · 1 yr 5 mos · Bengaluru, Karnataka, India · On-site

Siliconch systems

DFT Engneer

Jul 2022 – Aug 2024 · 2 yrs 1 mo · Bengaluru, Karnataka, India

Scan InsertionAutomatic Test Pattern Generation (ATPG)DFT

Sandisk®(western digital)

ASIC Development Engneering

Jul 2021 – Jun 2022 · 11 mos · Bangalore

Education

National Institute of Technology Warangal

Master of Technology - MTech — VLSI System Design

Aug 2020 – May 2022

Guru Jambheshwar University

Bachelor of Technology — Electronics and Communication Engineering

Jul 2014 – Jun 2018

Arya Sr. Sec. School

Intermediate — PCM

Apr 2012 – Mar 2014

Stackforce found 100+ more professionals with Dft & Digital Ic Design

Explore similar profiles based on matching skills and experience

T Hari Prakash

Formal Verification Engineer (FVCTO)

at Intel Corporation

Bengaluru, India3 yrs 8 mos exp

Formal Connectivity verificationVery-Large-Scale Integration (VLSI)

sandeep Acharya

Senior silicon design engineer

at AMD

Hyderabad, India5 yrs 1 mo exp

Analog DesignAnalog VerificationAnalog Circuit Design

Tushar Kumar

SoC Design Engineer

at Intel Corporation

Bengaluru, India5 yrs 2 mos exp

Physical DesignAPR

Himanshu Ranjan

Accumulated Expertise

at Career-Wide Experience

India0 mo exp

Srikanth Vaggu

RTL Design Engineer

at MediaTek

Bengaluru, India5 yrs 3 mos exp

RTL DesignProject ManagementSynthesisStatic Timing Analysis

Venkatesh Sutaru

Pre-Silicon Verification Engineer

at Intel Corporation

Piduguralla, India3 yrs 10 mos exp

Sai Raju Nuguri

Senior Engineer (STA Signoff)

at MediaTek

Hyderabad, India9 mos exp

ASIC DESIGNStatic Timing Analysis

Abhishek Agrawal

Senior Engineer

at MediaTek

Bengaluru, India2 yrs 4 mos exp