vijay sharma

CTO

Bengaluru, Karnataka, India15 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expertise in VLSI and Analog design.
  • Leadership role in semiconductor industry.
  • Proficient in Cadence tools for layout design.
Stackforce AI infers this person is a semiconductor design expert with extensive experience in VLSI and analog layout engineering.

Contact

Skills

Other Skills

VLSICadence VirtuosoCadenceDRCAnalogLVSMixed SignalASIC

Experience

15 yrs
Total Experience
2 yrs 3 mos
Average Tenure
7 yrs 11 mos
Current Experience

Samsung semiconductor

Associate Technical Director

Mar 2025Present · 1 yr 1 mo · Bengaluru, Karnataka, India

Samsung r&d institute india - bangalore private limited

Senior Staff Engineer

May 2018Present · 7 yrs 11 mos · Bengaluru, Karnataka, India

Aricent techologies

Analog Layout Lead engineer

Jul 2017May 2018 · 10 mos · Bengaluru, Karnataka, India

Sankalp semiconductor pvt ltd

senior analog layout design engineer

Jan 2016Jun 2017 · 1 yr 5 mos · Bengaluru, Karnataka, India

Atmel corporation

Analog layout Design Engineer

Sep 2014Oct 2015 · 1 yr 1 mo · Chennai Area, India

Smartplay technologies

Engineer

Aug 2012Aug 2014 · 2 yrs · Bangalore

  • Custom layout

Sasken,pune

Analog layout design engineer

Oct 2010Jul 2012 · 1 yr 9 mos

  • Custom layout design

Department of electronic science,university of pune

Project engineer

Aug 2010Sep 2010 · 1 mo

Education

Dpt of Electronic Science,Uop

master — Electronics

Jan 2008Jan 2010

Maharaja Agrasen college

B.SC(H) — Electronics

Jan 2005Jan 2008

Stackforce found 100+ more professionals with VLSI & Cadence Virtuoso

Explore similar profiles based on matching skills and experience