Adithya Pissay — Software Engineer

DFT Engineer with experience in implementing and optimizing DFT methodologies for complex System-on-Chip designs and IPs. Demonstrated expertise in DFT RTL insertion, ATPG, top-level retargeting, STIL file generation, and silicon bring-up. Proficient in developing and optimizing DFT flows for SoC projects, ensuring robust design validation and testing. Skilled in implementing state-of-the-art DFT features, including SSN, MBIST, EDT, OCC, and IJTAG, ensuring test coverage and reliable silicon performance. Proven ability to troubleshoot and resolve complex design challenges, leveraging problem-solving skills to enhance design robustness. Recognized as a proactive team player with a focus on delivering high-quality results while meeting critical project deadlines.

Stackforce AI infers this person is a DFT Engineer specializing in semiconductor design and validation.

Location: Bengaluru, Karnataka, India

Experience: 3 yrs 7 mos