Puneet Sabbarwal

Director of Engineering

Bengaluru, Karnataka, India19 yrs 6 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Experienced DFT lead with extensive VLSI expertise.
Proficient in RTL design and low-power design methodologies.
Strong background in ASIC and SoC development.

Stackforce AI infers this person is a VLSI design expert with a focus on DFT and ASIC methodologies.

Contact

Skills

Core Skills

DftVlsi

Other Skills

ATPGNCSimLogic SynthesisJTAGSoCASICEDABISTPrimetimeTiming ClosureRTL designVerilogRTL codingLow-power DesignModelSim

Experience

19 yrs 6 mos

Total Experience

3 yrs 3 mos

Average Tenure

7 yrs 9 mos

Current Experience

Intel corporation

DFT lead

Jul 2018 – Present · 7 yrs 9 mos

DFTATPGNCSimLogic SynthesisJTAGVLSI+14

Texas instruments

DFT Lead

Jan 2016 – Jun 2018 · 2 yrs 5 mos · Bangalore

Mediatek

Staff Engineer

Jun 2015 – Dec 2015 · 6 mos · Bengaluru Area, India

Qualcomm

Senior Lead Engineer

Aug 2014 – Jun 2015 · 10 mos · Bengaluru Area, India

Broadcom

2 roles

Senior Staff Engineer - DFT

Promoted

Feb 2014 – Aug 2014 · 6 mos · Bengaluru Area, India

Staff II Engineer - DFT

Dec 2012 – Feb 2014 · 1 yr 2 mos · Bengaluru Area, India

Texas instruments

Senior DFT Design Engineer

Jul 2006 – Nov 2012 · 6 yrs 4 mos · Bengaluru Area, India

Education

Delhi College of Engineering

M.Tech — Electronics and Communication

Jan 2004 – Jan 2006

Kumaun University

B.Tech — Electronics and Communication

Jan 2000 – Jan 2004

Gayatri School, Agra

Jan 1999 – Present

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