Megha Agrawal

Software Engineer

Bengaluru, Karnataka, India8 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 7+ years in Semiconductor industry.
  • Expert in SOC and IP Verification.
  • Proficient in System Verilog and UVM.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in design verification methodologies.

Contact

LinkedIn

Skills

Other Skills

Universal Verification Methodology (UVM)AMBA AHBSYSTEM VERILOGDebuggingObject-Oriented Programming (OOP)Application-Specific Integrated Circuits (ASIC)Microsoft WordMicrosoft ExcelCC (Programming Language)VerilogEDASystem verilog assertionsOVMFunctional Verification

About

SUMMARY > Total 7+ years of experience in the Semiconductor industry as a design Verification Engineer. TECHNICAL SKILLS > SOC Verification > NOC Verification > IP Verification > System Verilog > Verilog > UVM,OVM > Protocol : AXI, AHB, APB,SPI,I2C,EMMC > C Language > Python Scipting Language > Waveform tools used : DVE, Verdi,xcelium INTERNATIONAL WORK EXPERIENCE > Johor, Malaysia 1 year

Experience

8 yrs 7 mos
Total Experience
2 yrs 10 mos
Average Tenure
4 yrs 10 mos
Current Experience

Samsung semiconductor

3 roles

Senior Staff Engineer

Promoted

Apr 2025 – Present · 1 yr 1 mo

Staff Engineer

Feb 2023 – May 2025 · 2 yrs 3 mos

Associate Staff Engineer

Jun 2021 – Jan 2023 · 1 yr 7 mos

Mediatek

Senior Design Verification Engineer

Aug 2019 – May 2021 · 1 yr 9 mos · Bengaluru Area, India

Eximius design

Design Verification Engineer

Jul 2017 – Jul 2019 · 2 yrs · Johor, Malaysia

Education

Institute of Engineering and Technology

Bachelor of Technology - BTech — Electronic and Communications Engineering Technology

Jan 2013 – Jan 2017

Aligarh Muslim University

SSC-II

Jan 2006 – Jan 2012

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