Mar 2020 – Present · 6 yrs 1 mo · Bengaluru, Karnataka, India

• Good understanding of the pnr/lec/ir/dft/scripting(perl/tcl/python) and timing concepts. worked at Qualcomm Bangalore, as PDCAD and responsible for PNR flow and
• methodology development and support..

Sep 2016 – Mar 2020 · 3 yrs 6 mos · Greater Hyderabad Area

• o Created EMIR flow static ,dynamic(vector/vecless), /SIGEM/Lowpower/CPM flow for cpu/soc blocks and Running IR on the blocks , reporting any issues found to PD eng .
• o Creating methodologies , improving existing to curb IR like via stapling ,opportunistic adding stripes.
• o Created several drc scripts to fix PDV issues , like Via spacing ,cpode ,gdcap shorts , OD length,via replacement issues by tracking caliber markers .
• o Streamline DFT flow to PNR flow as different step .
• o Automated license expiry/renewal process and license differ mechanism to avoid any disruption of the work .
• o Created a methodology to insert multibitFlops in the design replacing nearby single bit flops to reduce power and area .

Nov 2014 – Sep 2016 · 1 yr 10 mos · Hyderbad

• > Developed methodology to replace single bit flops with multibit flops which is placement and timing aware in innovus/encounter .
• > Created various PDV post processing scripts to tackle various drc violations like OD length ,metal shorts, CPODE, viaswap etc.
• > Setting up automated flow for static ,vcd, esd ,lowpower and dynamic EMIR analysis for Redhawk and consolidating its analysis.
• > Foundry tech-files installation and flow development.
• > Developed scripts to automate the licenses expiry report,ip-consistency checks, script to find idle servers, different types of parsers using object oriented perl(liberty,sdc).
• > Created webpages to display all tsmc standard cell views available ,regressions results of every day run(LVS,DRC,ANTENNA…), for the users at glance.
• > Deploying new tools from vendor site to servers, licenses bring up on servers .
• > Vendor(Tsmc/synopsys) provided cell libraries,memory compilers setup & releases to the teams ,support and debugg on CAD flow.
• > Generating macros(compiled memories) from synopsys compilers using integrator.
• > Created GUI on Timing Path Viewer in perl tk.
• > Supporting backend team with syn and pnr flows ,automating any requirement .Well aware of synthesis(RC/Genus) and PNR(Innovus/encounter) tools and flow .

Jan 2014 – Sep 2014 · 8 mos · Bangalore

• Creating regressions for various checks for validating DFT flow with good coverage and storing the generated report in the golden directory for future reference
• Running checks on chips(CPU’s , GPU’s) at various modes and verifying that run is clean, no differences.
• Debugging C++ and TCL programs.
• Writing TCL scripts , xml and yaml scripts to assist in the enhancement of EDA tools.
• Presently working in a IEEE1500 test standard Design,writing tcl scripts ,creating regression to support the devolpment of the design.
• Validating I1500 flow in various chips(CPU’s and GPU’s).