Astitva Bhargava

Software Engineer

Bengaluru, Karnataka, India13 yrs 9 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

14 years of experience in SoC design implementation.
Expert in optimizing performance, power, and area for CPUs.
Proficient in industry-standard EDA tools.

Stackforce AI infers this person is a Semiconductor Design Engineer with extensive experience in SoC implementation.

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Skills

Core Skills

System On A Chip (soc)Static Timing AnalysisLow-power DesignSynthesis

Other Skills

EngineeringSoCTiming AnalysisAtmel 8051Pnr ImplementationVerilogVLSITCLCPerlUSBASICPhysical DesignUnixComputer Architecture

About

Highly skilled and dedicated SoC Implementation Engineer with more than 14 years of hands-on experience in implementing complex SoC designs. Proficient in utilizing industry-standard EDA tools including Synopsys Fusion Compiler, Design Compiler, PrimeTime, Cadence Genus, and Innovus. Focused on optimizing performance, power, and area (PPA) for a high-speed CPU designs, contributing to the next generation of products.

Experience

13 yrs 9 mos

Total Experience

4 yrs 7 mos

Average Tenure

8 yrs 8 mos

Current Experience

Qualcomm

Senior Engineer

Aug 2017 – Present · 8 yrs 8 mos · Bengaluru, Karnataka, India · On-site

Lead a team responsible for synthesis and STA for complete SoC designs, ensuring timely and accurate delivery of project milestones. Developed and validated constraints at the full chip level to meet design specifications and performance targets.

EngineeringSystem on a Chip (SoC)Static Timing Analysis

Amd

2 roles

Design Engineer 2

Promoted

Jan 2015 – Aug 2017 · 2 yrs 7 mos · Greater Hyderabad Area

Played a key role in low-power implementation at both block and chip levels, optimizing power consumption while maintaining performance. Conducted synthesis and timing analysis for multiple tiles within the SoC using industry-standard EDA tools.

EngineeringLow-power DesignSynthesis