Anita Singh — Software Engineer

Anita has 7+ years of Semiconductor Industry Experience, with area of expertise in PD including Synthesis, Floor Planning, PnR, CTS, STA, ECO, Physical Verification and Sign-off Checks. Worked on various technology nodes 14nm/10nm/7nm/5nm. Proficient in tcl and perl scripting and automation. Handled Physical Design flows for Server Processor blocks - Synthesis, PNR, Timing Closure, PDV, signoff checks across multiple product tapeouts. • PNR execution of multiple blocks which includes Synthesis, floor planning, pin placement, placement, CTS, routing, extraction, timing closure, PDV and signoff checks - from netlist to GDSII. Performed sanity checks at each stage. Also handled RDL routing. • Performed LVS, EMIR, antenna checks, DRC, density, ERC, Bump checks and LEC. • Performed CTS and Optimisation techniques to converge timing and implemented ECOs. • Developed the methodology for placement and routing, which was used by the organisation enabling time and cost savings.

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Timing Analysis.

Location: Bengaluru, Karnataka, India

Experience: 11 yrs 4 mos