Vijay Chandran Parambath

Software Engineer

Bengaluru, Karnataka, India15 yrs 8 mos experience
Highly Stable

Key Highlights

  • Expert in Multi-Die design and implementation.
  • Proficient in low power and physical design across multiple technology nodes.
  • Strong background in signal and power integrity.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Multi-Die architectures.

Contact

LinkedIn

Skills

Core Skills

3dicPhysical Design

Other Skills

Multi Die implementation- using 3DIC CompilerPPAPhysical VerificationVery-Large-Scale Integration (VLSI)PNRStatic Timing AnalysisTiming ClosureLow-power Design

About

Multi-Die design engineer having experience implementing interposer designs considering assembly rules, understanding thermal footprint , signal and power integrity, mechanical issues and routing considerations. Experienced physical design engineer with a demonstrated history of working in the semiconductors industry. Skilled in handling low power designs. • Worked on Physical Design activities across technology nodes - 40nm, 28nm, 14nm, 7nm, 6nm , 3nm etc. -- Floor planning , Placement, CTS, Routing, ECO implementation and physical verification (DRC, LVS, Antenna).

Experience

15 yrs 8 mos
Total Experience
5 yrs 4 mos
Average Tenure
5 yrs
Current Experience

Synopsys inc

Senior Staff Engineer

May 2021 – Present · 4 yrs 11 mos

Multi Die implementation- using 3DIC CompilerPhysical Design3DIC

Mediatek

Staff Engineer

Sep 2018 – May 2021 · 2 yrs 8 mos

Wipro limited

2 roles

Senior Project Engineer

Promoted

Dec 2014 – Sep 2018 · 3 yrs 9 mos

Student Employee

Aug 2010 – Nov 2014 · 4 yrs 3 mos

Education

Birla Institute of Technology and Science, Pilani

Master's degree — Computer Software Engineering

Jan 2010 – Jan 2014

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