Dinesh Varada

Software Engineer

Andhra Pradesh, India7 yrs experience
Highly Stable

Key Highlights

  • Experienced in advanced silicon design techniques.
  • Proficient in Place & Route and DRC methodologies.
  • Strong background in electronics design and analysis.
Stackforce AI infers this person is a Silicon Design Engineer with expertise in electronics and physical design.

Contact

LinkedIn

Skills

Core Skills

Electronics DesignStatic Timing AnalysisPlace & RouteDesign Rule Checking (drc)

Other Skills

RDLBumpLayout Versus Schematic (LVS)Analog Routing

Experience

7 yrs
Total Experience
3 yrs 5 mos
Average Tenure
2 mos
Current Experience

Amd

Sr Silicon Design Engineer

Mar 2026 – Present · 2 mos · Bengaluru, Karnataka, India

Place & RouteDesign Rule Checking (DRC)Electronics DesignRDLBumpLayout Versus Schematic (LVS)+2

Soctronics

Physical Design Engineer

Nov 2019 – Mar 2026 · 6 yrs 4 mos · Greater Hyderabad Area

Place & RouteDesign Rule Checking (DRC)

Veda iit

Physical Design Engineer Trainee

May 2019 – Nov 2019 · 6 mos · Greater Hyderabad Area

Education

ANITS

Bachelor of Engineering — Electronics and communications engineering

Jan 2014 – Jan 2018

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