Suraj M.

Software Engineer

Bengaluru, Karnataka, India12 yrs 10 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Experienced in ASIC and VLSI design.
Proficient in RTL design and functional verification.
Skilled in automation using Perl for DFT processes.

Stackforce AI infers this person is a VLSI and ASIC design engineer with strong automation skills.

Contact

Skills

Core Skills

AsicVlsiDft

Other Skills

VerilogModelSimVHDLPerlMatlabXilinxCDigital Circuit DesignFastscanCadence VirtuosoAltera QuartusTcl-TkRTL designStatic Timing AnalysisFPGA

Experience

12 yrs 10 mos

Total Experience

4 yrs 3 mos

Average Tenure

5 yrs 2 mos

Current Experience

Amd

MTS Silicon Design Engineer

Feb 2021 – Present · 5 yrs 2 mos · Bangalore Urban, Karnataka, India

VerilogModelSimVHDLPerlMatlabXilinx+16

Intel technology india pvt ltd

DFT engineer

May 2014 – Feb 2021 · 6 yrs 9 mos · Pune, Maharashtra

Intel corporation

Project Intern

Aug 2012 – Jul 2013 · 11 mos · Bengaluru Area, India

Working in Test Quality Team, Responsible for fault grading of different clusters for server designs.
Methodology :- SBFT & ATPG
Automation for flow of fault grade team using perl.
Tools:- Fastscan, VCS,DFTvisualizer.

PerlFastscanVCSDFTvisualizerDFT

Education

Vellore Institute of Technology

Master of Technology (M.Tech.) — V L S I

Jan 2011 – Jan 2013

Walchand Institute Of Technology, Solapur

Bachelor of Engineering (B.E.) — Electronics and Communications Engineering

Jan 2006 – Jan 2010

Shri Uma Vidyalaya Modnimb

Jan 2001 – Jan 2004

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