Divya Goswami

Design Manager

Delhi, India9 yrs experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Experienced in VLSI design and verification.
  • Proficient in multiple hardware description languages.
  • Strong background in semiconductor industry.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in semiconductor architecture.

Contact

Skills

Core Skills

VerilogSystem VerilogMicro Architecture DesignRtl Implementation

Other Skills

CLinuxVerificationOCPAXIAPBMicrosoft OfficeMatlabH-SpiceMicrosoft PowerPointSimulationsamba abp

About

working at nxp

Experience

9 yrs
Total Experience
2 yrs 3 mos
Average Tenure
3 yrs 4 mos
Current Experience

Nxp semiconductors

Senior Lead Designer

Jan 2023Present · 3 yrs 4 mos · India

CVerilogSystem VerilogLinux

Qualcomm

2 roles

Senior Design Engineer

Promoted

Sep 2020Dec 2022 · 2 yrs 3 mos

Design Engineer

Sep 2018Sep 2020 · 2 yrs

Logic-fruit technologies

Design Engineer

Sep 2017Aug 2018 · 11 mos · Gurgaon, India

Samsung india

Intern

Jan 2017Jul 2017 · 6 mos · New Delhi Area, India

  • Responsible for micro architecture design , RTL implementation and verification of various interface bridges to facilitate communication between different bus protocols like OCP, AXI,APB etc and other IPs which are used in Bus system
Micro architecture designRTL implementationVerificationOCPAXIAPB

Education

Malaviya National Institute of Technology Jaipur

Master of Technology (MTech) — VLSI design

Jan 2015Jan 2017

IIIT Hyderabad

Advance certification in artificial intelligence and machine learning — machine learning

Jan 2018Jan 2019

Indira Gandhi Delhi Technical University for Women

b.tec — Electronics n Communication

Jan 2010Jan 2014

Stackforce found 100+ more professionals with Verilog & System Verilog

Explore similar profiles based on matching skills and experience