Krish Mehta

Software Engineer

Santa Clara, California, United States6 yrs 5 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

4+ years in CPU Memory Subsystem Verification.
Expertise in RTL debugging and design verification.
Proven track record in optimizing testbench performance.

Stackforce AI infers this person is a Semiconductor Verification Engineer with a strong focus on CPU architecture.

Contact

Skills

Core Skills

Hardware ArchitectureSystemverilog

Other Skills

SQLFunctional VerificationUniversal Verification Methodology (UVM)ARM ArchitectureCache CoherencyDesign Verification TestingApplication-Specific Integrated Circuits (ASIC)C++Microsoft OfficeMicrosoft PowerPointMicrosoft WordMicrosoft ExcelPublic SpeakingMatlabAutoCAD

About

Computer Architecture professional with 4+ years of experience in validation of complex features to ensure A0 success. Currently working on CPU Memory Subsystem Verification at NVIDIA. An avid lover of computers and computer games, I design custom mechanical keyboards in my free time!

Experience

6 yrs 5 mos

Total Experience

3 yrs 2 mos

Average Tenure

5 yrs 5 mos

Current Experience

Nvidia

6 roles

Senior Verification Engineer

Promoted

Jan 2025 – Present · 1 yr 3 mos · Santa Clara, California, United States

Verification Engineer

Jun 2024 – Dec 2024 · 6 mos · Santa Clara, California, United States

Senior Verification Engineer

Promoted

Jul 2022 – Sep 2023 · 1 yr 2 mos · Bengaluru, Karnataka, India

Delivering state-of-the-art bug-free RTL for Memory Subsystems of NVIDIA's latest CPUs
Design Verification, RTL debugging and Coverage closure of various features in close co-ordination with Design and Architecture teams

Verification Engineer

Promoted

Jul 2020 – Jul 2022 · 2 yrs · Bengaluru, Karnataka, India

Exhaustive micro-architectural verification of various L3 cache replacement policies
Optimisation of cycles-per-second performance of Testbenches by 20-50% using hyperpameter optimisation of VCS options

ASIC Engineer

Jul 2019 – Jul 2020 · 1 yr · Bengaluru, Karnataka, India

SystemVerilogHardware Architecture

Hardware Engineering Intern

May 2018 – Jul 2018 · 2 mos · Bangalore, India

- Redesigned the register specification storage framework of NVIDIA's chip bringup software

SystemVerilogSQL

Techfest, iit bombay

Event Manager

Mar 2017 – Mar 2018 · 1 yr · Mumbai Area, India

Responsible for Conceptualization, Ideation and Execution of Asia's Largest Science and Technological Festival, with a footfall of more than 1,75,000 every year.