M

Muralidhara Ramalingaiah

CEO

Bengaluru, Karnataka, India21 yrs experience

Key Highlights

  • 22+ years of experience in design and verification leadership.
  • Expertise in VLSI and hardware verification methodologies.
  • Proven track record in managing complex verification projects.
Stackforce AI infers this person is a VLSI and Hardware Verification expert with extensive experience in semiconductor design.

Contact

LinkedIn

Skills

Other Skills

Hardware VerificationOVMeRMOVCeVCSpecmanIPSoCSystemVerilogVerilogASICOpen Verification MethodologyEmbedded SystemsHardwareUVM

About

22+ years of experience in leading ,managing and building Design and verification team

Experience

21 yrs
Total Experience
2 yrs 7 mos
Average Tenure
3 mos
Current Experience

Boeing

VLSI

Feb 2026 – Present · 3 mos · Karnataka, India · On-site

Insemi technology services pvt. ltd.

Senior Director -DV

Aug 2024 – Feb 2026 · 1 yr 6 mos · Bengaluru · On-site

Pppasschip technologies private limited

Director

May 2024 – Aug 2024 · 3 mos · India · On-site

  • 1. Design Verification

Intel corporation

Senior Engineering Manager

Dec 2015 – May 2024 · 8 yrs 5 mos · Bengaluru Area, India

  • Design and Verification of Compute express link(CXL) based cache coherent Host/devices
  • Configurable RF transceiver SOC verification for 4G/5G protocol
  • IOT related SOC/ASIC Verification using UVM

Mediatek

Staff Engineer

Mar 2014 – Dec 2015 · 1 yr 9 mos · Singapore

  • UVM based verification For Data center Ethernet Switches

Nvidia

Senior ASIC design engineer

Mar 2012 – Mar 2014 · 2 yrs · Bangalore

  • Verification lead for Mipi-CSI3/CSI2 host Verification , UVM based test-bench architecture/Verification/testplan
  • US Patent filed on "Filtering Excessive Image Data in Cameras" Serial Number is 14056215

Cypress semiconductor

Elect Design Engr Sr Staff

Jan 2011 – Mar 2012 · 1 yr 2 mos · Bengaluru Area, India

  • OVM/UVM , OVC and Test bench architecture for Universal serial communication protocol, Technical lead.

Samsung

Development Lead

Apr 2006 – Jan 2011 · 4 yrs 9 mos

  • 1.Ip and system level verification using HVL(e,Vera,SV) , methodologies eRM
  • 2. Interaction with the Design team as Verification Lead.
  • 3. MIPI-DSI,Film grain technology, DMA controllers, DDR2-DDR3 controllers, SDIO, Multi format decoder , Video filters, AHCI-SATA,TS-DEMUX

Wipro technologies

Senior software engineer

Apr 2005 – Mar 2006 · 11 mos

  • Nokia camera SOC

Education

Bangalore University

BE — Electrical

Visvesvaraya Technological University

Master of Technology (MTech) — VLSI Design and Embedded Systems

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