Gopi Reddy Venkata Subba Reddy — Software Engineer
Worked on SRAM dual Port and Single port, ROM and Register file Single port and dual port Memory compilers. Technology: 3nm, 5nm, 7nm, 16nm and 22nm FinFet, 28nm, 90nm, 130nm CMOS Tasks Done: 1) Bitcell analysis (RDM, ADM, WRM, Leakage current analysis) 2) PPA analysis, validation and optimization. PPA optimization is done using multi vt devices. 3) Margining (Solving races, internal holds and pulse width evaporation) 4) Charecterization (Generating liberty files, solving issues in curve fitting) 5) Verification and validation of Timing data, power and leakage generated by characterization
Stackforce AI infers this person is a Memory Design Engineer with expertise in advanced CMOS technologies.
Location: Bengaluru, Karnataka, India
Experience: 14 yrs 4 mos
Skills
- Memory Design
- Cmos
Career Highlights
- Expert in Memory Design across multiple technology nodes.
- Proficient in PPA analysis and optimization techniques.
- Strong background in memory compiler design and validation.
Work Experience
Broadcom Inc.
Memory Design Engineer (5 yrs)
MediaTek
Memory Design Engineer(Contract) (1 yr 4 mos)
Broadcom Inc.
Memory design engineer (1 yr 3 mos)
Intel Corporation
Design Engineer (1 yr 4 mos)
Insemi Technology Services Pvt. Ltd.
Staff Design Engineer (5 yrs 1 mo)
AMD
Memory Design Engineer (9 mos)
Sankalp Semiconductor
Senior Engineer (3 mos)
Arm
Memory Desing engineer (4 yrs 1 mo)
Interra Systems
Memory Design Engineer (4 yrs 3 mos)
Education
M.Tech at Sree Vidyaniketan Engg College
Bachelor of Technology (B.Tech.) at MITS
