Chirag Tyagi

Software Engineer

Bengaluru, Karnataka, India8 yrs 1 mo experience

Highly Stable

Key Highlights

Over eight years in semiconductor verification.
Expertise in AI accelerator chip verification.
Contributed to major projects at Meta and Google.

Stackforce AI infers this person is a Semiconductor Verification Engineer with a focus on AI hardware solutions.

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Skills

Core Skills

Subsystem VerificationVerification Ip

Other Skills

CIP VerificationLogic DesignRISC-VPerlSVADigital LogicAssertionsSoC VerificationTCL ScriptingPython (Programming Language)VerilogSystemVerilogUniversal Verification Methodology (UVM)Programming

About

At Meta, my focus is on advancing SoC and subsystem verification for AI accelerator chips, emphasizing the robustness and security of key hardware components. Work involves intricate design verification processes, contributing to the development of cutting-edge AI hardware solutions. With over eight years in the semiconductor industry, contributions span IP, subsystem, and SoC verification for mobile, automotive, and AI products at companies like Meta and Google. Expertise includes security block verification and MIPI protocol-related verification IP. Motivated to drive impactful innovations in the ASIC domain, enhancing the future of semiconductor technology.

Experience

8 yrs 1 mo

Total Experience

2 yrs 2 mos

Average Tenure

1 yr 7 mos

Current Experience

Google

ASIC DV Engineer

Aug 2021 – Sep 2024 · 3 yrs 1 mo · Bengaluru, Karnataka, India · Hybrid

Worked on Google Pixel's Tensor mobile processor chips.
Actively contributed towards different IP components, complex subsystems and SoC level design verification.

Subsystem VerificationIP Verification

Nxp semiconductors

Senior Design Engineer

May 2020 – Aug 2021 · 1 yr 3 mos · Noida, Uttar Pradesh, India

Worked on Hardware Security Engine subsystem verification for various NXP
automotive chips with varied security and complexity.
Owned key security blocks such as fuseboxes of
ROM containing secret keys, blocks detecting glitches and handling severe security violations on the chip.

CSubsystem Verification

Synopsys inc

Research And Development Engineer

Mar 2018 – May 2020 · 2 yrs 2 mos · Greater Delhi Area · On-site

Verification IP development with focus on protocols such as MIPI Camera Serial Interface 2 (CSI2) and Display Serial Interface (DSI) with CPHY/DPHY physical layers.
Worked on compression codecs such as VESA Display Stream Compression (DSC) for MIPI DSI.
Worked on coverages, checkers, sequences, random tests and constraints-based verification.

Verification IPLogic Design