Ankala Rishivardhan

Software Engineer

Telangana, India11 mos experience

Key Highlights

  • Experienced in RTL tool flow and methodology.
  • Proficient in debugging and quality checks.
  • Strong foundation in VLSI and SoC design.
Stackforce AI infers this person is a VLSI design engineer with expertise in RTL development and verification.

Contact

Skills

Core Skills

Rtl DesignRtl Development

Other Skills

Python (Programming Language)spyglass toolsRTL CodingDigital Circuit DesignLintPerlSpyglassSystemVerilogVerilogCDCVHDL

Experience

11 mos
Total Experience
11 mos
Average Tenure
--
Current Experience

Intel corporation

SoC Design Engineer

Jul 2022Jun 2023 · 11 mos · Bengaluru, Karnataka, India · Hybrid

  • Working in domain RTL tool flow and Methodology :
  • 1.Performing Hands on RTL quality checks using the spyglass LINT and DFT.
  • 2. Hands on clock domain crossing checks (CDC) using a spyglass CDC.
  • 2.1. based on CDC objectives such as cdc_setup_checks, cdc_verify_struct, rdc_verify_struct
  • and cdc_verify_funct.
  • 3. Exposure to scripting like Perl, shell, and python.
  • 4. Basic Knowledge of Processor/SoC architecture &RTL Coding.
  • 5.Debugging skills (i.e); to solve/debug the issues independently
RTL DesignPython (Programming Language)RTL Development

Education

Maulana Azad National Institute of Technology

Master of Technology - MTech — Electronics and communication

Jul 2021Nov 2023

Indian Institute of Information Technology Design & Manufacturing, Kurnool

Bachelor of Technology - BTech — Electronics and Communication

Jun 2016Jun 2020

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