Mayank Mangla

Product Engineer

Delhi, India4 yrs 1 mo experience

Most Likely To Switch

Key Highlights

Expert in VLSI design and product validation.
Strong background in SoC design and timing analysis.
Proficient in automation testing and database functional testing.

Stackforce AI infers this person is a Semiconductor and IT Services professional with expertise in VLSI design and quality assurance.

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Skills

Core Skills

Product ValidationVlsi DesignSoc DesignTiming AnalysisQuality AssuranceDatabase Testing

Other Skills

TCLVerilogSystemVerilogLinuxJasperSystem on a Chip (SoC)Synopsys PrimetimeCalibreASIC design flowScriptingPhysical Design FlowStatic Timing AnalysisMicroelectronicsOrganization SkillsMicrosoft Excel

About

MTech Electronics Engineer with VLSI System Design Specialization, looking forward to work in pragmatic way in an organization where I can contribute and enhance my skills to meet company goals and objectives with full integrity and zest.

Experience

4 yrs 1 mo

Total Experience

1 yr 4 mos

Average Tenure

2 yrs 2 mos

Current Experience

Cadence design systems

Product Validation Engineer II

Mar 2024 – Present · 2 yrs 2 mos · Noida · Hybrid

Played a key role in validating complex features of the Xcelium product.
Leveraged JasperGold for in-depth debugging of timing paths and analysis of intricate circuit architectures.
Designed and implemented TCL scripts to enhance key Xcelium features to support customer requirements.
Conducted on-site business visits to support customers in validating timing constraints for
their projects, ensuring alignment with design requirements.

TCLVerilogSystemVerilogLinuxJasperProduct Validation+1

Intel corporation

SOC Design Intern

Aug 2022 – May 2023 · 9 mos · Bengaluru, Karnataka, India

Worked as a part of the SOC Timing team.
Leveraged Primetime for the execution of Full-Chip Mesh Timing runs and contributing to Timing Convergence.
Taking charge of the vital task of running Full-Chip Caliber to ensure top-tier SOC quality roll-up.
Harnessing the power of shell scripting to streamline and automate the Full Chip Timing runs, thereby reducing manual effort.

System on a Chip (SoC)Synopsys PrimetimeCalibreASIC design flowScriptingPhysical Design Flow+8

Delhi technological university (formerly dce)

Teaching Assistant

Oct 2021 – Aug 2022 · 10 mos · Delhi, India

Cognizant

2 roles

Programming Analyst (Quality Engineering & Assurance)

Feb 2021 – Oct 2021 · 8 mos · Pune, Maharashtra, India

Conducted comprehensive database functional testing with SQL, significantly enhancing data accuracy.
Harnessed the power of Tableau to validate high-level data, streamlining the reporting process for increased efficiency.
Furthermore, I played a pivotal role in the automation effort by implementing test cases.

Microsoft ExcelSelenium WebDriverAutomation TestingSQLTableauFunctional Testing+3