Ashish Bajaj

CEO

Hyderabad, Telangana, India21 yrs 11 mos experience
Highly Stable

Key Highlights

  • Led a multi-site organization across four countries.
  • Achieved a $5B+ design-win pipeline.
  • Successfully exited a startup via acqui-hire.
Stackforce AI infers this person is a leader in Wireless IoT and Edge Computing.

Contact

Skills

Core Skills

Embedded SystemsLow-power DesignMachine Learning FrameworksCamera SystemsDebuggingMultimedia

Other Skills

Digital Signal ProcessingEmbedded SoftwareRTOSCDevice DriversLinuxVideo SystemsAudio SystemsNode.jsGitInternet Protocol Suite (TCP/IP)

About

Vice President leading a 150+ multi-site organisation across the US, France, Hungary and India, shipping wireless and edge platforms (Wi-Fi, RAIL, Sub-GHz, TinyML). I focus on innovation, execution and customer impact—cutting time-to-integrate, improving power, throughput and latency, and lifting release quality. Earlier at Qualcomm, I built teams from scratch in video/camera DSP firmware, low-power SoC architecture, 2G/3G/4G power optimisation and ML frameworks. As CEO & Co-Founder of Elear Solutions, I led the company to an exit via acqui-hire (2022); I’m passionate about open-source and community-building—with a clear intent to open-source COCO when time allows. Today I drive products that enable a $5B+ design-win pipeline, guided by a scorecard of Innovation, Customer Success and Software Quality.

Experience

21 yrs 11 mos
Total Experience
15 yrs 1 mo
Average Tenure
6 yrs 10 mos
Current Experience

Elear solutions

2 roles

Principal Maintainer, COCO (personal capacity; source-open in progress).

Mar 2022Present · 4 yrs 2 mos

CEO and Co-Founder (acqui-hired by Silicon Labs, 2022)

Jun 2019Feb 2022 · 2 yrs 8 mos

  • Our vision is to build a world class Edge Development Platform for Apps and Services in the 5G world.
  • We achieve this by using the power of Peer-to-Peer Mesh networking over IP networks. Its literally a "back-to-the-future" moment where mainframes were disrupted by client-server. We look to disrupt the cloud using the edge. We have already taken great strides in this direction with COCO. Check it out by clicking the links below.
  • And that's not all, to demonstrate that COCO is not just a concept on paper, we have built our smart home reference solution powered by COCO.

Silicon labs

Vice President — Edge AI Inference & Wireless | Wi-Fi · Proprietary · Sub-GHz · RAIL

Mar 2022Present · 4 yrs 2 mos · Hyderabad, Telangana, India

  • Lead a 150+ multi-site organisation across Austin, Boston, Rennes, Budapest and Hyderabad, delivering Wi-Fi/RAIL/Sub-GHz and TinyML edge-inference software. I drive products that power a $5B+ design-win pipeline, with a focus on reducing time-to-integrate for customers. My scorecard is anchored to Innovation • Customer Success • Software Quality, converting deep tech into predictable releases and measurable outcomes.
Low-power DesignEmbedded SystemsDigital Signal ProcessingEmbedded SoftwareRTOSC+2

Qualcomm

7 roles

Director of Engineering for Chipset Power, Camera/Video/Audio Systems, Machine Learning Frameworks

Promoted

Dec 2017Jun 2019 · 1 yr 6 mos · Greater Hyderabad Area

  • Seeded various systems engineering teams out of Qualcomm Hyderabad office focussing on Camera, Video, Audio and Machine Learning Inference frameworks.
  • The team culture of innovation, gritty engineering, and hands-on leadership stood out in the Hyderabad office and was true to the founding culture of Qualcomm.
  • Worked with my leads in building a group of over 80 high performing engineers in the various areas. Very proud of the team that we built.
Machine Learning FrameworksCamera SystemsVideo SystemsAudio Systems

Principal Engineer/Manager

Promoted

May 2015Nov 2017 · 2 yrs 6 mos · Greater Hyderabad Area

  • Chipset Power Engineering leadership for Qualcomm India.

Senior Staff Engineer/Manager

Nov 2012May 2015 · 2 yrs 6 mos · Greater Hyderabad Area

  • Seed Chipset Power Engineering and Modem Power Engineering teams for Qualcomm India.
  • Create charter and roadmap for the teams, including demarcating clear ownership across various global organizations.
  • Deep study of competitive data for idle and standby power across 2G/3G/4G wireless technologies and proposing numerous optimizations to make product power best in class for the tier.
  • Plenty of idle mode/standby optimizations in Dual SIM/Multi SIM devices
  • Seeded and incorporated the Modem Field power initiative to study the complete modem stack from Layer 2 to PHY, and the impact to power in various field conditions like poor network deployments, roaming, out of service, cell reselections, neighbor cell measurements, PDCCH, CDRx, etc.
  • Commercialized the world's first 4G chipset in value tier markets 8916.
  • Commercialized the world's first Octa-core supported chipset in 8939, managed multiple Tier 1 customer engagements with Samsung, Sony, Nokia, etc.

Staff Engineer/Manager

May 2010Nov 2012 · 2 yrs 6 mos · Greater Hyderabad Area

  • Individual contributions as Chipset Power Lead for MSM7x27A, 7x27AA, 8x25, and 8x25Q (first Quad core mobile processor in the world)
  • The role required a complete chipset lifecycle knowledge from Product Definition to System Analysis and Hardware/Software Co-Design to Chip Bring Up to Delivery of Power Goals to Mass Commercialization and Support till end of life of product
  • Provide Organizational wide leadership to make the products competitive in the market space from the power metric standpoint
  • Design of an aDSP Dynamic Clock and Switching Module to optimize Video decode and Video encode power, working concurrently with audio
  • Design of Low Power Audio Software Architecture and Delivery
  • Many power optimizations in Android upgrades from GingerBread to IceCreamSandwich to JellyBean
  • Delivery of Power on Windows Phone8
  • Power Optimize WhatsApp, Email Sync, etc.

Lead Engineer, Sr

Promoted

Nov 2007May 2010 · 2 yrs 6 mos · Greater Hyderabad Area

  • Seeded the DSP firmware team for Video firmware.
  • Design, Implementation and Support of various codecs: H.264, WMV9, RV9, VP6, etc.
  • Design and Implementation of some enhancement features like: Frame Rate Up Conversion, Post Loop Deblocking, etc.
  • Involved in designs of various H/W architectural improvements to aid in optimizations of power and performance for the next generation multimedia chips
  • Involved in various RTOS architectural and design improvements to aid in optimizations of power and performance for the current as well as next generation multimedia chips
  • Extremely proficient with various kind of hardware debug activities with limited debug tools. Debugged various issues (hardware, software, firmware related), especially during the first commercialization phase of the chip
  • Undertook bring up activities for various new hardware tape-outs
DebuggingMultimedia

Senior Engineer

Promoted

May 2006Nov 2007 · 1 yr 6 mos · Greater Hyderabad Area

  • Design and implementation of the entire multimedia task based system on top of the RTOS. Worked on voice, audio and video sub-systems designs and implementations.
  • Performance based analysis at system level, to judge task priorities, based on timing and buffering
  • Concurrency analysis and design (accounting for non-linearities like cache, bus-bandwidth, etc.).
  • Optimal memory map design and layout for the upcoming targets to improve on concurrency performance
  • Design of various performance analysis tools (Execution Profiler, Task by Task MIPS, Cache Analyzer, etc.) using the ETM hardware
  • Lead a small team of 3 folks for design and implementation of the offline voice transcoding sub-system
  • Stream lined the entire build management and the DSP firmware release process
  • Enablement of the DSP Partner Program, a unique program that enables key partners to learn about the QDSP and develop firmware on top of it. Created a comprehensive training module for the QDSP5000 processor ISA, tools, RTOS and firmware architecture; delivered the training to the team as well as 3rd party developers. Worked with Lauterbach to deliver various features for the Run Time Debug tools (In-Silicon Debugger, Embedded Trace Macro, etc.)

Engineer

Apr 2004May 2006 · 2 yrs 1 mo · Greater Hyderabad Area

  • Employee #1 @Qualcomm India.
  • Early formative days as an engineer and being the first employee, got a chance to take on responsibilities well beyond my title level. Help seed the DSP firmware team that focussed on hand coded assembly for memory and compute efficiency across QDSP4 and QDSP5 architectures. Ownership of the team was on implementation of multimedia codecs across Voice, Audio, Video and Camera technologies for QDSP4000 and QDSP5000 based DSPs.
  • Ported various speech and audio codecs (EFR, MP3, etc.) from QDSP4000 to QDSP5000, and integrated into a RTOS based system
  • Windows Media Video Decoder 9 (SP@LL) implementation, and integrated into BIOS based system
  • Implemented various DME (Direct Memory Exchange) routines to support memory overlays for EAAC+
  • Overlooking various porting activities of codecs like 4GV, HR, G711, and their integration into the voice sub-system

Education

Georgia Institute of Technology

Master of Science (MS) — Electrical and Computer Engineering

Jan 2002Jan 2003

Georgia Institute of Technology

Bachelors of Science — Computer Engineering

Jan 1999Jan 2001

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