Nagesh Vishnumurthy

Director of Engineering

Bengaluru, Karnataka, India26 yrs 1 mo experience

Highly StableAI Enabled

Key Highlights

Over 26 years in semiconductor industry leadership.
Built Samsung's GPU Verification team from scratch.
Proven track record in managing large technical teams.

Stackforce AI infers this person is a Semiconductor industry leader with extensive experience in GPU and SoC design and verification.

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Skills

Core Skills

GpuSocVerificationDesign Verification

Other Skills

CXLPower ManagementDVARMProcessor DesignAICoherent interconnectASICProcessorsVLSIMicroprocessorsComputer ArchitectureVerilogDebuggingSemiconductors

About

Accomplished semiconductor industry leader with over 26 years of experience specializing in SoC, GPU, Interconnect fabric and CPU verification, design, and delivery. Proven track record of setting up and managing large technical teams (up to 85+), driving flagship projects at Samsung, AMD, Broadcom, Intel, and IBM. Built Samsung’s GPU Verification & Emulation team from the ground up, delivering multiple generations of flagship Galaxy SoC GPUs. Renowned for cross-functional team leadership, technical execution, process improvements, and fostering a culture of innovation. MBA from IIM Bangalore and BE (NITK), recognized industry-wide for mentoring, technical vision, and driving teams to success.

Experience

26 yrs 1 mo

Total Experience

4 yrs 2 mos

Average Tenure

9 mos

Current Experience

Rambus

Director of Engineering

Aug 2025 – Present · 9 mos · Bengaluru, Karnataka, India · Hybrid

Samsung electronics

Director of Engineering

Feb 2022 – Aug 2025 · 3 yrs 6 mos · Bangalore Urban, Karnataka, India

Set up and led Samsung’s GPU Design Verification and Emulation team from the ground up, delivering multiple flagship Galaxy SoC GPUs (M2, M3, M4, M5) on schedule and managing complex feature verification across several product generations. Contributions towards derivative products GPU. Grew the team from 0 to 60 member for Eclipse 920 GPU.

GPU

Amd

Senior Manager

Jun 2016 – Jan 2022 · 5 yrs 7 mos · Bengaluru Area, India

India Lead Infinity Fabric Verification
((PIE(Power Management, Interrupt, ETC), CXL, CMP UVC, DF TB, RTG & Client Deployment),
RTL and PostSilicon teams.
Participated in many LSDs and Tape-outs (Genesis, Badami, Renoir, Matisse, Cezanne, Rembrandt, Navi2x, Navi3x, Mi100, Mi200, Mi300…) Grew the team from 40 to 80 engineers.
Previously Managing Server SoC Verification ( led CDP, DFD, CReST, Gatesim teams) and lead Milan (Starship B0) DV to Tapeout.
Setup SCBU Verification/ATPG team and grew team from 0 to 40 engineers.

Mediatek

Senior Manager

Apr 2016 – May 2016 · 1 mo · Bangalore

Broadcom

2 roles

Sr. Manager, IC Design Engineering

Mar 2015 – Mar 2016 · 1 yr · Bangalore

Significant DV ownership of 64b, super scalar high-speed ARM processor (Fetch, Issue, Scheduler, Mapper, EX, floating point, SIMD, MMU, LS). Bus Interface unit ownership of ARM A53 subsystem which went into products like 4908, 6858, 7268, 7261. Grounds up development of Random Instruction generator and Instruction simulator

Manager, IC Design Engineering

Dec 2012 – Feb 2015 · 2 yrs 2 mos · Bangalore

Started a greenfield Design Verification team building a team, through hiring high quality talent, experienced for Processor Verification in India

Amd

Manager, Core Verification, Technology Group

Oct 2010 – Nov 2012 · 2 yrs 1 mo

Manage India Test Plan and Infrastructure team of Steamroller(28nm) and Excavator (20nm) x86 CPU core processor.

Intel

2 roles

Engineering Manager

May 2008 – Oct 2010 · 2 yrs 5 mos

Managing Engineering team in Full Chip Micro-Processor Pre-Silicon Verification Team for 10 core Xen Server Microprocessor

Sr. VLSI Design Engineer

Nov 2002 – Apr 2008 · 5 yrs 5 mos

Sr. Design Engineer with Broad Design and Verification experience in server and mobile Microprocessor Designs. Involved in verification of multiple billion transistor design chips. Contributed to Yonah, Intel's first Dual Core, Low Power, Mobile Micro-Processor, Merom Intel's Core Duo Microprocessor, Whitefield (4 core 65nm) enterprise server microprocessor and Dunnington - India's first 6-core (6 core 45nm) enterprise server microprocessor. Lead Instruction Architecture Verification team in 8 core Xeon Server (32nm) Microprocessor

Ibm

VLSI Design Engineer

Aug 1999 – Oct 2002 · 3 yrs 2 mos

As a VLSI design engineer worked on multiple complex chips ranging from BLUEGENE supercomputer (switch design), PCI Excercizer, IBM Core Connect bus, Graphics Processor Verification, PCI-X Core Verification