S

Srinivas Marni

Software Engineer

India8 yrs 3 mos experience
Highly Stable

Key Highlights

  • Expert in ASIC design and verification methodologies.
  • Proficient in multiple hardware description languages.
  • Strong background in DFT engineering.
Stackforce AI infers this person is a DFT Engineer specializing in ASIC design and verification.

Contact

LinkedIn

Skills

Core Skills

Application-specific Integrated Circuits (asic)Universal Verification Methodology (uvm)

Other Skills

VerilogLinuxSystemVerilogVHDLC

Experience

8 yrs 3 mos
Total Experience
2 yrs 9 mos
Average Tenure
--
Current Experience

Mediatek

2 roles

Staff DFT Engineer

Promoted

Jun 2024 – Dec 2025 · 1 yr 6 mos · Bengaluru, Karnataka, India · On-site

VerilogLinuxSystemVerilogApplication-Specific Integrated Circuits (ASIC)VHDLC+1

Senior DFT Engineer

Jan 2022 – May 2024 · 2 yrs 4 mos · Bengaluru, Karnataka, India · On-site

VerilogLinuxSystemVerilogApplication-Specific Integrated Circuits (ASIC)VHDLC+1

Cerium systems

Senior DFT Engineer

Oct 2020 – Dec 2021 · 1 yr 2 mos · Bengaluru, Karnataka, India

VerilogLinuxSystemVerilogApplication-Specific Integrated Circuits (ASIC)VHDLC+1

Adeptchips

DFT ENGINEER

Jul 2017 – Oct 2020 · 3 yrs 3 mos

VerilogLinuxSystemVerilogApplication-Specific Integrated Circuits (ASIC)VHDLC+1

Stackforce found 100+ more professionals with Application-specific Integrated Circuits (asic) & Universal Verification Methodology (uvm)

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