Nitin Pant — Director of Engineering
- Managing Physical Verification and Power analysis/Power Integrity teams - Power analysis/power integrity methodology development - Physical design activities for memory and standard cells test vehicles - Test structure development for standard cell validation - Automation environment development for standard cell integration validation - Full Chip Power Grid signoff for multiple SoCs
Stackforce AI infers this person is a Semiconductor Design Expert with a focus on Power Integrity and Physical Design.
Location: Bengaluru, Karnataka, India
Experience: 20 yrs 9 mos
Skills
- Power Integrity
- Physical Design
Career Highlights
- Expert in Power Integrity and Physical Design methodologies.
- Leadership in managing silicon design engineering teams.
- Proven track record in full chip power grid signoff.
Work Experience
AMD
Director Silicon Design Engineering (2 yrs 8 mos)
Intel Corporation
Engineering Manager (8 yrs 5 mos)
Qualcomm
Staff Engineer (5 mos)
Qualcomm India Pvt. Ltd
Lead Engineer Sr. (2 yrs 1 mo)
Freescale Semiconductor India Pvt. Ltd.
Lead Design Engineer (7 yrs 2 mos)
Education
MTech at Indian Institute of Technology, Roorkee
Bachelor of Engineering (B.E.) at L.D. College of Engineering
at Kendriya Vidyalaya, Cantt, Ahmedabad
at Rachana School, Ahmedabad
at St. Joseph Academy , Dehradun
